Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

Preview PDF HTML

TNETV1647GSTZWT Datasheet(PDF) 104 Page - Texas Instruments

Click here to check the latest version.
Part # TNETV1647GSTZWT
Description  Digital Media System-on-Chip
PDF  236 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV1647GSTZWT Datasheet(HTML) 104 Page - Texas Instruments

Back Button TNETV1647GSTZWT Datasheet HTML 100Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 101Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 102Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 103Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 104Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 105Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 106Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 107Page - Texas Instruments TNETV1647GSTZWT Datasheet HTML 108Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 104 / 236 page
background image
TMS320DM6441
SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010
www.ti.com
6.4.1
Reset Electrical Data/Timing
Table 6-8. Timing Requirements for Reset (see Figure 6-9)
1.05 V and 1.2 V
NO.
UNIT
MIN
MAX
1
tw(RST)
Width of the RESET pulse
444
ns
2
tsu(BOOT)
Setup time, boot configuration bits valid before RESET high
444
ns
3
th(BOOT)
Hold time, boot configuration bits valid after RESET high
444
ns
Table 6-9. Switching Characteristics Over Recommended Operating Conditions During Reset(1)
(see Figure 6-9)
1.05 V and 1.2 V
NO.
UNIT
MIN
MAX
26
td(PLL_LOCK)
Delay time, PLL1 lock time
2000P
ns
4
td(RSTL-DDRZZ)
Delay time, RESET low to DDR2 Z Group high impedance
0
2P + 20
ns
5
td(RSTL-DDRLL)
Delay time, RESET low to DDR2 Low Group low
0
20
ns
6
td(RSTL-DDRHH)
Delay time, RESET low to DDR2 High Group high
0
20
ns
16
td(RSTL-DDRZHZ)
Delay time, RESET low to DDR2 Z/High Group high impedance
0
5P + 20
ns
17
td(RSTL-DDRLHL)
Delay time, RESET low to DDR2 Low/High Group low
0
20
ns
7
td(RSTL-ZZ)
Delay time, RESET low to Z Group high impedance
0
20
ns
8
td(RSTL-LOWL)
Delay time, RESET low to Low Group low
0
20
ns
9
td(RSTL-HIGHH)
Delay time, RESET low to High Group high
0
20
ns
18
td(RSTL-HIGHLOWH)
Delay time, RESET low to High/Low Group high
0
20
ns
19
td(RSTL-LOWHIGHL)
Delay time, RESET low to Low/High Group low
0
20
ns
24
td(RSTL-ZIZ)
Delay time, RESET low to Z/Invalid Group high impedance
0
20
ns
10
td(RSTH-DDRZV)
Delay time, RESET high to DDR2 Z Group valid
(2)
ns
11
td(RSTH-DDRLV)
Delay time, RESET high to DDR2 Low Group valid
(2)
ns
12
td(RSTH-DDRHV)
Delay time, RESET high to DDR2 High Group valid
(2)
ns
20
td(RSTH-DDRZHV)
Delay time, RESET high to DDR2 Z/High Group valid high
4000P
ns
21
td(RSTH-DDRLHV)
Delay time, RESET high to DDR2 Low/High Group valid high
4000P
ns
13
td(RSTH-ZV)
Delay time, RESET high to Z Group valid
(2)
ns
14
td(RSTH-LOWV)
Delay time, RESET high to Low Group valid
(2)
ns
15
td(RSTH-HIGHV)
Delay time, RESET high to High Group valid
(2)
ns
22
td(RSTH-HIGHLOWV)
Delay time, RESET high to High/Low Group valid low
5100P
ns
23
td(RSTH-LOWHIGHV)
Delay time, RESET high to Low/High Group valid high
5100P
ns
25
td(RSTH-ZIIV)
Delay time, RESET high to Z/Invalid Group invalid
4000P
ns
(1)
P = MXI/CLKIN cycle time, in ns.
(2)
Following RESET high, this signal group maintains the state the pins(s) achieved while RESET was driven low until the peripheral is
enabled via the PSC. For example, the DDR2 Z Group goes high impedance following RESET low and remains in the high-impedance
state following RESET high until the DDR2 controller is enabled via the PSC.
104
Peripheral and Electrical Specifications
Copyright © 2006–2010, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TMS320DM6441



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com