MCP47CMB02 datasheet(51/124 Pages) MICROCHIP

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DS20006089B-page 51

MCP47CXBXX

4.2.2

NONVOLATILE REGISTER

MEMORY (MTP)

This memory option is available only for the

MCP47CMBXX devices.

MTP memory starts functioning below the device’s

VPOR/VBOR trip point, and once the VPOR event

occurs, the Volatile Memory registers are loaded with

the corresponding MTP register memory values.

Memory addresses, 0Ch through 1Fh, are nonvolatile

memory locations. These registers contain the DAC

POR/BOR wiper values, the DAC POR/BOR Configura-

tion bits, the I2C Slave address and eight general

purpose memory addresses for storing user-defined

data as calibration constants or identification numbers.

The Nonvolatile DAC Wiper registers and Configuration

bits contain the user’s DAC Output and configuration

values for the POR event.

The Nonvolatile DAC Wiper registers contain the user’s

DAC output and configuration values for the POR

event. These nonvolatile values will overwrite the

factory default values. If these MTP addresses are

unprogrammed, the factory default values define the

output state.

The Nonvolatile DAC registers enable the stand-alone

operation of the device (without microcontroller control)

after being programmed to the desired values.

To program nonvolatile memory locations, a high-

voltage source on the LAT/HVC pin is required. Each

After 32 writes, a new write operation will not be

possible and the last successful value written will

remain associated with the memory location.

The device starts writing the MTP memory cells at the

completion of the serial interface command at the rising

edge of the last data bit. The high voltage should

remain present on the LAT/HVC pin until the write cycle

is complete; otherwise, the write is unsuccessful and

the location is compromised (cannot be used again and

the number of available writes decreases by one).

To recover from an aborted MTP write operation, the

following procedure must be used:

• Write again any valid value to the same address

• Force a POR condition

• Write again the desired value to the MTP location

It is recommended to keep high voltage on only during

the MTP write command and programming cycle;

otherwise, the reliability of the device could be affected.

4.2.3

POR/BOR OPERATION WITH

WIPERLOCK TECHNOLOGY

ENABLED

Regardless of the WiperLock technology state, a POR

event will load the Volatile DACx Wiper register value

with the Nonvolatile DACx Wiper register value. Refer

to Section 4.1 “Power-on Reset/Brown-out Reset

(POR/BOR)” for further information.

4.2.4

UNIMPLEMENTED LOCATIONS

4.2.4.1

Unimplemented Register Bits

When issuing read commands to a valid memory loca-

tion with unimplemented bits, the unimplemented bits

will be read as ‘0’.

4.2.4.2

Unimplemented (RESERVED)

Locations

There are a number of unimplemented memory

locations that are reserved for future use. Normal

(voltage) commands (read or write) to any unimple-

mented memory address will result in a command

error condition (I2C NACK).

High-voltage commands to any unimplemented

Configuration bit(s) will also result in a command error

condition.

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