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MCP47CMB02 Datasheet(PDF) 87 Page - Microchip Technology |
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MCP47CMB02 Datasheet(HTML) 87 Page - Microchip Technology |
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87 / 124 page ![]() 2018-2019 Microchip Technology Inc. DS20006089B-page 87 MCP47CXBXX 8.3 Application Examples The MCP47CXBXX devices are rail-to-rail output DACs designed to operate with a VDD range of 2.7V to 5.5V. The internal output amplifier is robust enough to drive common, small signal loads directly, thus eliminating the cost and size of the external buffers for most applications. The user can use the gain of 1 or 2 of the output op amp by setting the Configuration register bits. The internal VDD or an external reference can be used. There are various user options and easy- to-use features that make the devices suitable for various modern DAC applications. Application examples include: • Decreasing Output Step-Size • Building a “Window” DAC • Bipolar Operation • Selectable Gain and Offset Bipolar Voltage Output • Designing a Double Precision DAC • Building Programmable Current Source • Serial Interface Communication Times • Software I2C Interface Reset Sequence • Power Supply Considerations • Layout Considerations 8.3.1 DC SET POINT OR CALIBRATION A common application for the devices is a digitally controlled set point and/or calibration of variable parameters, such as sensor offset or slope. For example, the MCP47CVB2X provides 4096 output steps. If the voltage reference is 4.096V (where Gx = 0), the LSb size is 1 mV. If a smaller output step-size is desired, a lower external voltage reference is needed. 8.3.1.1 Decreasing Output Step-Size If the application is calibrating the bias voltage of a diode or transistor, a bias voltage range of 0.8V may be desired, with about 200 µV resolution per step. Two common methods to achieve small step-size are to use a lower VREF pin voltage or a voltage divider on the DAC’s output. Using an external Voltage Reference (VREF) is an option if the external reference is available with the desired output voltage range. However, when using a low-voltage reference voltage, occasionally the noise floor causes an SNR error that is intolerable. Using a voltage divider method is another option, and provides some advantages when external voltage reference needs to be very low, or when the desired output voltage is not available. In this case, a larger value reference voltage is used, while two resistors scale the output range down to the precise desired level. Figure 8-3 illustrates this concept. A bypass capacitor on the output of the voltage divider plays a critical function in attenuating the output noise of the DAC and the induced noise from the environment. FIGURE 8-3: Example Circuit of Set Point or Threshold Calibration. EQUATION 8-1: VOUT AND VTRIP CALCULATIONS R1 VCC+ VCC- VOUT I2C 2-Wire VREF Optional MCP47CVBXX VDD VO R2 C1 RSENSE Comp. VDD VTRIP Vtrip VOUT R2 R1 R2 + -------------------- = VOUT = VREF • G • DAC Register Value 2N |
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