MCP47CMB02 datasheet(54/124 Pages) MICROCHIP

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MCP47CXBXX

DS20006089B-page 54

 2018-2019 Microchip Technology Inc.

ence Control register. Each DAC has two bits to control

the source of the voltage reference of the DAC. This

of this register is two times the number of DACs for the

device.

VOLTAGE REFERENCE (VREF) CONTROL REGISTERS (08h/18h)

(VOLATILE/NONVOLATILE)

U-0

U-0 R/W-n R/W-n R/W-n R/W-n

Single

—

———

——

—(1)

—(1) VR0B VR0A

Dual

—

VR1B VR1A VR0B VR0A

bit 15

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

= Single channel device

= Dual channel device

Single

Dual

bit 15-2

bit 15-4

Unimplemented: Read as ‘0’

bit 1-0

bit 3-0

VRxB:VRxA: DAC Voltage Reference Control bits

11 =VREF pin (buffered); VREF buffer enabled

10 =VREF pin (unbuffered); VREF buffer disabled

01 = Internal band gap (1.214V typical); VREF buffer enabled, VREF voltage driven when

powered down(2)

00 =VDD (unbuffered); VREF buffer disabled, use this state with power-down bits for lowest current

Note 1: Unimplemented bit, read as ‘0’.

2: When the internal band gap is selected, the band gap voltage source will continue to output the voltage on

the VREF pin in any of the Power-Down modes. To reduce the power consumption to its lowest level

(band gap disabled), after selecting the desired Power-Down mode, the voltage reference should be

changed to VDD or the VREF pin unbuffered (‘00’ or ‘10’), which turns off the Internal band gap circuitry.

After wake-up, the user needs to reselect the internal band gap (‘01’) for the voltage reference source.

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