MCP47CMB02 datasheet(17/124 Pages) MICROCHIP

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 2018-2019 Microchip Technology Inc.

DS20006089B-page 17

MCP47CXBXX

1.2

I2C Mode Timing Waveforms and Requirements

FIGURE 1-3:

Power-on and Brown-out Reset Waveforms.

FIGURE 1-4:

I2C Power-Down Command Timing.

VDD

tBORD

VOUT

VBOR

VOUT at High-Z

SPI Interface is Operational

VPOR

tPOR2SIA = tPOR2OD

SDA

SCL

ACK

Stop

Start

ACK

VOUT

tPDD

tPDE

TABLE 1-3:

RESET TIMING

Timing Characteristics

Standard Operating Conditions (unless otherwise specified):

Operating Temperature: -40°C

 TA  +125°C (Extended)

All parameters apply across the specified operating ranges unless noted.

VDD = +2.7V to 5.5V, VSS =0V, RL =2 k from VOUT to GND, CL =100 pF.

Typical specifications represent values for VDD =5.5V, TA = +25°C.

Parameters

Sym.

Min.

Typ. Max. Units

Conditions

Power-on Reset Delay(1)

tPOR2SIA

—

130

µs

Single

Monitor ACK bit response to ensure

the device responds to command

—

145

Dual

Brown-out Reset Delay

tBORD

—30

—

µs

VDD transitions from VDD(MIN)  > VPOR,

VOUT driven to VOUT disabled

Power-Down Output

Enable Time Delay

TPDE

—

1.5

—

µs

PDxB:PDxA = 11, 10, or 01  00 started from

the rising edge of the SCL at the end of the 8th

clock cycle, Volatile DAC register = FFFh,

VOUT =10mV, VOUT not connected

Power-Down Output

Disable Time Delay

TPDD

—

0.025

—

µs

PDxB:PDxA = 00 11, 10 or 01 started from

the rising edge of the SCL at the end of the

8th clock cycle, VOUT =VOUT –10mV,

VOUT not connected

Note 1 Not tested. This parameter is ensured by characterization.

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