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MCP47CMB02 Datasheet(PDF) 58 Page - Microchip Technology |
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MCP47CMB02 Datasheet(HTML) 58 Page - Microchip Technology |
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58 / 124 page  MCP47CXBXX DS20006089B-page 58 2018-2019 Microchip Technology Inc. Register 4-6 shows the format of the DAC WiperLock Technology Status register. The width of this register is two times the number of DACs for the device. WiperLock technology bits only control access to volatile memory. Nonvolatile memory write access is controlled by the requirement of high voltage on the HVC pin, which is recommended to not be available during normal device operation. REGISTER 4-6: WiperLock™ TECHNOLOGY CONTROL REGISTER (1Bh) (NONVOLATILE) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-n R/W-n R/W-n R/W-n Single —— ——— ——— — — —— —(1) —(1) WL0B WL0A Dual —— ——— ——— — — —— WL1B WL1A WL0B WL0A bit 15 bit 0 Legend: R = Readable bit W = Writable bit C = Clearable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown = Single channel device = Dual channel device Single Dual bit 15-2 bit 15-4 Unimplemented: Read as ‘0’ bit 1-0 bit 3-1 WLxB:WLxA: WiperLock™ Technology Status bits(2) 11 = Volatile DAC Wiper register and Volatile DAC Configuration bits are locked 10 = Volatile DAC Wiper register is locked and Volatile DAC Configuration bits are unlocked 01 = Volatile DAC Wiper register is unlocked and Volatile DAC Configuration bits are locked 00 = Volatile DAC Wiper register and Volatile DAC Configuration bits are unlocked Note 1: Unimplemented bit, read as ‘0’. 2: The Volatile PDxB:PDxA bits are NOT locked due to the requirement of being able to exit Power-Down mode. |
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