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68HC705JB4 Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc |
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68HC705JB4 Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc |
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51 / 134 page  February 24, 1999 GENERAL RELEASE SPECIFICATION MC68HC05JB4 INPUT/OUTPUT PORTS MOTOROLA REV 2 7-5 selected. When a port pin is selected as ADC input and the ADON bit is set to ‘1’, the pin will be configured as input pin automatically regardless of the status of the DDR-bit. The value of the DDR-bit will not be affected. NOTE Reading from an output pin will return the content of the data register. 7.4.1 Port-C Data Register 7.4.2 Port-C Data Direction Register Port-C DDRX Pin Configuration 0 Input 1 Output Push/Pull BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 PTC R 0 0 PC5 PC4 PC3 PC2 PC1 PC0 $0002 W reset: 00000000 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 DDRC R 0 0 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0 $0006 W reset: 00000000 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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