68HC705JB4 datasheet(76/134 Pages) FREESCALE

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GENERAL RELEASE SPECIFICATION

February 24, 1999

MOTOROLA

UNIVERSAL SERIAL BUS MODULE

MC68HC05JB4

10-10

REV 2

When using the remote wake-up capability, the ﬁrmware must wait for at least 5

ms after the bus is in the idle state before sending the remote wake-up resume

signaling. This allows the upstream devices to get into their suspend state and

prepare for propagating resume signaling. The FRESUM bit should be asserted to

cause the resume state on the USB data lines for at least 10ms, but not more than

15ms. Note that the resume signalling is controlled by the FRESUM bit and

meeting the timing speciﬁcations is dependent on the ﬁrmware. When FRESUM is

cleared by ﬁrmware, the data lines will return to their high impedance state. Refer

to Section 10.5.5 for more information about how the Force Resume (FRESUM)

bit can be used to initiate the remote wake-up feature.

10.2.5 Low Speed Device

Externally, low speed devices are conﬁgured by the position of a pull-up resistor

on the USB D– pin of the MC68HC05JB4. Low speed devices are terminated as

shown in Figure 10-10 with the pull-up on the D– line.

Figure 10-10. External Low Speed Device Conﬁguration

For low speed transmissions, the transmitter’s EOP width must be between

1.25

µs and 1.50µs. These ranges include timing variations due to differential

buffer delay and rise/fall time mismatches and to noise and other random effects.

A low speed receiver must accept a 670ns wide SE0 followed by a J transition as

a valid EOP. An SE0 narrower than 330ns or an SE0 not followed by a J transition

must be rejected as an EOP. An EOP between 330ns and 670ns may be rejected

or accepted as above. Any SE0 that is 2.5

µs or wider is automatically a reset.

10.3

CLOCK REQUIREMENTS

The low speed data rate is nominally 1.5 Mbs. The OSCXCLK signal driven by the

oscillator circuits is the clock source for the USB module and requires that a 6

MHz oscillator circuit be connected to the OSC1 and OSC2 pins. The permitted

frequency tolerance for low speed functions is approximately

±1.5% (15000 ppm).

This tolerance includes inaccuracies from all sources: initial frequency accuracy,

crystal capacitive loading, supply voltage on the oscillator, temperature, and

aging. The jitter in the low speed data rate must be less than 10 ns. This tolerance

allows the use of resonators in low cost, low speed devices.

10.4

HARDWARE DESCRIPTION

The USB module as previously shown in Figure 10-1 contains four functional

blocks: a 3.3 volt Regulator, a LS USB transceiver, the USB control logic, and the

68HC05JB4

1.5K

Ω

D+

D–

3.3V Regulator Out

USB Low Speed Cable

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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