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68HC705JB4 Datasheet(PDF) 60 Page - Freescale Semiconductor, Inc |
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68HC705JB4 Datasheet(HTML) 60 Page - Freescale Semiconductor, Inc |
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60 / 134 page ![]() GENERAL RELEASE SPECIFICATION February 24, 1999 MOTOROLA 16-BIT TIMER MC68HC05JB4 9-4 REV 2 9.2 ALTERNATE COUNTER REGISTERS (ACRH, ACRL) The functional block diagram of the 16-bit free-running timer counter and alternate counter registers is shown in Figure 9-4. The alternate counter registers behave the same as the timer registers, except that any reads of the alternate counter will not have any effect on the TOF flag bit and Timer interrupts. The alternate counter registers include a transparent buffer latch on the LSB of the 16-bit timer counter. Figure 9-4. Alternate Counter Block Diagram The alternate counter registers (ACRH, ACRL) shown in Figure 9-5 are read-only locations which contain the current high and low bytes of the 16-bit free-running counter. Writing to the alternate counter registers has no effect. Reset of the device presets the timer counter to $FFFC. The ACRL latch is a transparent read of the LSB until the a read of the ACRH takes place. A read of the ACRH latches the LSB into the ACRL location until the ACRL is again read. The latched value remains fixed even if multiple reads of the ACRH take place before the next read of the ACRL. Therefore, when reading the MSB of the timer at ACRH the LSB of the timer at ACRL must also be read to complete the read sequence. During power-on-reset (POR), the counter is initialized to $FFFC and begins counting after the oscillator start-up delay. Because the counter is sixteen bits and preceded by a fixed divide-by-four prescaler, the value in the counter repeats every 262,144 internal bus clock cycles (524,288 oscillator cycles). Reading the ACRH and ACRL in any order or any number of times does not have any effect on the 16-bit free-running counter or the TOF flag bit. BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ACRH R ACRH7 ACRH6 ACRH5 ACRH4 ACRH3 ACRH2 ACRH1 ACRH0 $001A W reset: 11111111 ACRL R ACRL7 ACRL6 ACRL5 ACRL4 ACRL3 ACRL2 ACRL1 ACRL0 $001B W reset: 11111100 Figure 9-5. Alternate Counter Registers (ACRH, ACRL) ACRH ($001A) TMR LSB 16-BIT COUNTER ÷ 4 INTERNAL (fOSC ÷ 2) RESET CLOCK ACRL ($001B) INTERNAL ($FFFC) DATA READ ACRH READ ACRL READ LATCH BUS Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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