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68HC705JB4 Datasheet(PDF) 14 Page - Freescale Semiconductor, Inc

Part # 68HC705JB4
Description  68HC05JB4
PDF  134 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

68HC705JB4 Datasheet(HTML) 14 Page - Freescale Semiconductor, Inc

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GENERAL RELEASE SPECIFICATION
February 24, 1999
MOTOROLA
GENERAL DESCRIPTION
MC68HC05JB4
1-2
REV 2
•
Fully compliant to Low Speed USB with 3 Endpoints:
– 1 Control Endpoint (2x8 byte buffer)
– 2 Interrupt Endpoints (1x8 byte buffer shared)
•
6-channel 8-bit Analog-to-Digital Converter (ADC)
•
Multi-function Timer (MFT)
•
16-bit Timer with 1 input capture and 1 output compare
•
Low Voltage Reset (LVR) Circuit
•
Computer Operating Properly (COP) Watchdog Reset
•
Provide a 3.3V
±10% DC Voltage for USB pull-up resistor
•
Fully Static Operation with no Minimum Clock Speed
•
Illegal Address Reset
•
Power-Saving STOP and WAIT Modes
•
Available in 28-Pin PDIP and 28-Pin SOIC packages
1.2
MASK OPTIONS
The following mask options are available:
•
Enable PA0 to PA3 as extra IRQ interrupt sources.
•
External interrupt pins (IRQ, PA0 to PA3): negative edge-triggered or
negative edge- and low level-triggered.
•
High current (25mA) output on PA6 and PA7.
•
OSC: crystal/ceramic resonator start up delay, 4064 or 128 clock cycles.
•
LVR: enabled or disabled.
•
COP: enabled or disabled.
1.3
MCU STRUCTURE
Figure 1-1 shows the structure of MC68HC05JB4 MCU.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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