68HC705JB4 datasheet(10/134 Pages) FREESCALE

10 / 134 page

GENERAL RELEASE SPECIFICATION

February 24, 1999

MOTOROLA

MC68HC05JB4

viii

REV 2

LIST OF FIGURES

Figure

Title

Page

10-11 Regulator Electrical Connections ................................................................. 10-11

10-12 Low Speed Driver Signal Waveforms .......................................................... 10-12

10-13 Differential Input Sensitivity Over Entire Common Mode Range ................. 10-13

10-14 Data Jitter..................................................................................................... 10-14

10-15 Data Signal Rise and Fall Time.................................................................... 10-14

10-16 NRZI Data Encoding .................................................................................... 10-15

10-17 Flow Diagram for NRZI ................................................................................ 10-15

10-18 Bit Stuffing.................................................................................................... 10-16

10-19 Flow Diagram for Bit Stuffing ....................................................................... 10-17

10-20 USB Address Register (UADDR) ................................................................. 10-18

10-21 USB Interrupt Register 0 (UIR0) .................................................................. 10-19

10-22 USB Interrupt Register 1(UIR1) ................................................................... 10-20

10-23 USB Control Register 0 (UCR0)................................................................... 10-21

10-24 USB Control Register 1 (UCR1)................................................................... 10-22

10-25 USB Control Register 2 (UCR2)................................................................... 10-23

10-26 USB Status Register (USR) ......................................................................... 10-25

10-27 USB Endpoint 0 Data Register (UE0D0-UE0D7)......................................... 10-25

10-28 USB Endpoint 1/Endpoint2 Data Registers (UE1D0-UE1D7)...................... 10-26

10-29 OUT Token Data Flow for Receive Endpoint 0 ............................................ 10-28

10-30 SETUP Token Data Flow for Receive Endpoint 0........................................ 10-29

10-31 IN Token Data Flow for Transmit Endpoint 0 ............................................... 10-30

10-32 IN Token Data Flow for Transmit Endpoint 1/2 ............................................ 10-31

11-1

ADC Converter Block Diagram ...................................................................... 11-1

11-2

A/D Status and Control Register .................................................................... 11-3

11-3

A/D Data Register .......................................................................................... 11-4

A-1

MC68HC705JB4 Memory Map ........................................................................A-2

A-2

EPROM Programming Sequence ....................................................................A-4

Freescale Semiconductor, Inc.

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