68HC705JB4 datasheet(19/134 Pages) FREESCALE

19 / 134 page

February 24, 1999

GENERAL RELEASE SPECIFICATION

MC68HC05JB4

GENERAL DESCRIPTION

MOTOROLA

REV 2

1-7

1.4.8 PB0-PB4

These ﬁve I/O lines comprise Port-B. PB0 to PB4 are push-pull pins with internal

pull-up resistors. The state of any pin is software programmable and all Port B

lines are conﬁgured as inputs during power-on or reset. The internal pull-up resis-

tor is software enable. In addition, all Port-B pins have Slow Falling Edge Control

which is enabled by software. PB0 can be used as the input capture pin when the

input capture function is enabled on the 16-bit Timer. PB0 has built-in schmitt trig-

gered input. When the ADC function is enabled, PB3 and PB4 can be used as

extra two analog input channels (AD4 and AD5 respectively) to the ADC.

1.4.9 PC0-PC5

These six I/O lines comprise Port-C. PC0 to PC5 are push-pull pins. The state of

any pin is software programmable and all Port C lines are conﬁgured as inputs

during power-on or reset. When the ADC function is enabled, PC0 thru PC3

become the four analog input channels to the ADC and PC4 and PC5 become the

analog “High” and “Low” reference voltages to the ADC respectively.

Freescale Semiconductor, Inc.

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68HC705JB4 Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc