68HC705JB4 datasheet(81/134 Pages) FREESCALE

81 / 134 page

February 24, 1999

GENERAL RELEASE SPECIFICATION

MC68HC05JB4

UNIVERSAL SERIAL BUS MODULE

MOTOROLA

REV 2

10-15

When transmitting, the control logic handles parallel to serial conversion, CRC

generation, NRZI encoding, and bit stufﬁng.

When Receiving, the control logic handles Sync detection, packet identiﬁcation,

end of packet detection, bit (un)stufﬁng, NRZI decoding, CRC validation, and

serial to parallel conversion. Errors detected by the control logic include bad CRC,

time-out while waiting for EOP, and bit stufﬁng violations.

10.4.4.1 Data Encoding/Decoding

The USB employs NRZI data encoding when transmitting packets. In NRZI

encoding, a 1 is represented by no change in level and a 0 is represented by a

change in level. Figure 10-16 shows a data stream and the NRZI equivalent and

Figure 10-17 is a ﬂow diagram for NRZI. The high level represents the J state on

the data lines in this and subsequent ﬁgures showing NRZI encoding. A string of

zeros causes the NRZI data to toggle each bit time. A string of ones causes long

periods with no transitions in the data.

Figure 10-16. NRZI Data Encoding

Figure 10-17. Flow Diagram for NRZI

IDLE

DATA

IDLE

NRZI

0110

000

POWER UP

NO PACKET

TRANSMISSION

IDLE

BEGIN PACKET

FETCH THE

DATA BIT

YES

NO DATA

TRANSITION

IS PACKAGE

TRANSFER

DONE?

YES

DATA

TRANSMISSION

IS DATA

BIT = 0?

Freescale Semiconductor, Inc.

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