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DSPIC33EP128GS708 Datasheet(PDF) 202 Page - Microchip Technology

Part # DSPIC33EP128GS708
Description  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33EP128GS708 Datasheet(HTML) 202 Page - Microchip Technology

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dsPIC33EPXXXGS70X/80X FAMILY
DS70005258C-page 202
 2016-2018 Microchip Technology Inc.
REGISTER 16-13: PDCx: PWMx GENERATOR DUTY CYCLE REGISTER (x = 1 to 8)(1,2,3)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PDCx<15:8>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PDCx<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
PDCx<15:0>: PWMx Generator Duty Cycle Value bits
Note 1:
In Independent PWM mode, the PDCx register controls the PWMxH duty cycle only. In the
Complementary, Redundant and Push-Pull PWM modes, the PDCx register controls the duty cycle of both
the PWMxH and PWMxL.
2:
The smallest pulse width that can be generated on the PWMx output corresponds to a value of 0x0008,
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
3:
As the duty cycle gets closer to 0% or 100% of the PWM period (0 to 40 ns, depending on the mode of
operation), PWMx duty cycle resolution will increase from one to three LSBs.
REGISTER 16-14: SDCx: PWMx SECONDARY DUTY CYCLE REGISTER (x = 1 to 8)(1,2,3)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SDCx<15:8>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
SDCx<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
SDCx<15:0>: PWMx Secondary Duty Cycle for PWMxL Output Pin bits
Note 1:
The SDCx register is used in Independent PWM mode only. When used in Independent PWM mode, the
SDCx register controls the PWMxL duty cycle.
2:
The smallest pulse width that can be generated on the PWMx output corresponds to a value of 0x0008,
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
3:
As the duty cycle gets closer to 0% or 100% of the PWM period (0 to 40 ns, depending on the mode of
operation), PWMx duty cycle resolution will increase from one to three LSBs.



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