DSPIC33EP128GS708 datasheet(207/484 Pages) MICROCHIP

207 / 484 page

 2016-2018 Microchip Technology Inc.

DS70005258C-page 207

dsPIC33EPXXXGS70X/80X FAMILY

R/W-1

R/W-0

PENH

PENL

POLH

POLL

PMOD1(1)

PMOD0(1)

OVRENH

OVRENL

bit 15

bit 8

R/W-0

OVRDAT1

OVRDAT0

FLTDAT1(2)

FLTDAT0(2)

CLDAT1(2)

CLDAT0(2)

SWAP

OSYNC

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

PENH: PWMxH Output Pin Ownership bit

1 = PWMx module controls the PWMxH pin

0 = GPIO module controls the PWMxH pin

bit 14

PENL: PWMxL Output Pin Ownership bit

1 = PWMx module controls the PWMxL pin

0 = GPIO module controls the PWMxL pin

bit 13

POLH: PWMxH Output Pin Polarity bit

1 = PWMxH pin is active-low

0 = PWMxH pin is active-high

bit 12

POLL: PWMxL Output Pin Polarity bit

1 = PWMxL pin is active-low

0 = PWMxL pin is active-high

bit 11-10

PMOD<1:0>: PWMx I/O Pin Mode bits(1)

11 = PWMx I/O pin pair is in the True Independent Output mode

10 = PWMx I/O pin pair is in the Push-Pull Output mode

01 = PWMx I/O pin pair is in the Redundant Output mode

00 = PWMx I/O pin pair is in the Complementary Output mode

bit 9

OVRENH: Override Enable for PWMxH Pin bit

1 = OVRDAT1 provides data for output on the PWMxH pin

0 = PWMx generator provides data for the PWMxH pin

bit 8

OVRENL: Override Enable for PWMxL Pin bit

1 = OVRDAT0 provides data for output on the PWMxL pin

0 = PWMx generator provides data for the PWMxL pin

bit 7-6

OVRDAT<1:0>: Data for PWMxH, PWMxL Pins if Override is Enabled bits

If OVRENH = 1, OVRDAT1 provides data for the PWMxH pin.

If OVRENL = 1, OVRDAT0 provides data for the PWMxL pin.

bit 5-4

FLTDAT<1:0>: State for PWMxH and PWMxL Pins if FLTMOD<1:0> are Enabled bits(2)

IFLTMOD (FCLCONx<15>) = 0: Normal Fault mode:

If Fault is active, then FLTDAT1 provides the state for the PWMxH pin.

If Fault is active, then FLTDAT0 provides the state for the PWMxL pin.

IFLTMOD (FCLCONx<15>) = 1: Independent Fault mode:

If current limit is active, then FLTDAT1 provides the state for the PWMxH pin.

If Fault is active, then FLTDAT0 provides the state for the PWMxL pin.

Note 1:

These bits should not be changed after the PWMx module is enabled (PTEN = 1).

State represents the active/inactive state of the PWMx depending on the POLH and POLL bits settings.

DSPIC33EP128GS708 Datasheet(PDF) 207 Page - Microchip Technology

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