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DSPIC33EP128GS708 Datasheet(PDF) 213 Page - Microchip Technology

Part # DSPIC33EP128GS708
Description  16-Bit Digital Signal Controllers for Digital Power Applications with Interconnected High-Speed PWM, ADC, PGA and Comparators
PDF  484 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33EP128GS708 Datasheet(HTML) 213 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS70005258C-page 213
dsPIC33EPXXXGS70X/80X FAMILY
bit 1
BPLH: Blanking in PWMxL High Enable bit
1 = State blanking (of current-limit and/or Fault input signals) when the PWMxL output is high
0 = No blanking when the PWMxL output is high
bit 0
BPLL: Blanking in PWMxL Low Enable bit
1 = State blanking (of current-limit and/or Fault input signals) when the PWMxL output is low
0 = No blanking when the PWMxL output is low
REGISTER 16-24: LEBCONx: PWMx LEADING-EDGE BLANKING (LEB) CONTROL REGISTER
(x = 1 to 8) (CONTINUED)
Note 1:
The blanking signal is selected via the BLANKSEL<3:0> bits in the AUXCONx register.
REGISTER 16-25: LEBDLYx: PWMx LEADING-EDGE BLANKING DELAY REGISTER (x = 1 to 8)
U-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
—
—
LEB<8:5>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
U-0
U-0
LEB<4:0>
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
Unimplemented: Read as ‘0’
bit 11-3
LEB<8:0>: Leading-Edge Blanking Delay for Current-Limit and Fault Inputs bits
The value is in 8.32 ns increments.
bit 2-0
Unimplemented: Read as ‘0’



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