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DSPIC33EP128GS708 Datasheet(PDF) 217 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 217 Page - Microchip Technology |
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217 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 217 dsPIC33EPXXXGS70X/80X FAMILY 17.0 PERIPHERAL TRIGGER GENERATOR (PTG) MODULE 17.1 Module Introduction The Peripheral Trigger Generator (PTG) provides a means to schedule complex, high-speed peripheral operations that would be difficult to achieve using soft- ware. The PTG module uses 8-bit commands, called “Steps”, that the user writes to the PTG Queue register (PTGQUE0-PTQUE15) which performs operations, such as wait for input signal, generate output trigger and wait for timer. The PTG module has the following major features: • Multiple Clock Sources • Two 16-Bit General Purpose Timers • Two 16-Bit General Limit Counters • Configurable for Rising or Falling Edge Triggering • Generates Processor Interrupts to include: - Four configurable processor interrupts - Interrupt on a Step event in Single-Step mode - Interrupt on a PTG Watchdog Timer time-out • Able to Receive Trigger Signals from these Peripherals: -ADC -PWM - Output Compare - Input Capture - Comparator -INT2 • Able to Trigger or Synchronize to these Peripherals: - Watchdog Timer - Output Compare - Input Capture -ADC -PWM - Comparator Note 1: This data sheet summarizes the features of the dsPIC33EPXXXGS70X/80X family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to “Peripheral Trigger Generator (PTG)” (DS70000669) in the “dsPIC33/PIC24 Family Reference Manual”, which is available from the Microchip website (www.microchip.com). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. |
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