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XM014035B Datasheet(PDF) 86 Page - Xmos Ltd. |
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XM014035B Datasheet(HTML) 86 Page - Xmos Ltd. |
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86 / 101 page ![]() XU6--FB6 Datasheet D.6 Padcontrol LPDDR WE_N PADCTRL_WE_N 0xD003 When LPDDR is enabled, this register controls the PAD properties for the WE_N pin Bits Perm Init Description Identier : RO - Reserved 6 RW Set to to enable the schmitt trigger PADCTRL_SCHMITT_TRIGGER_ENABLE RW Set to to enable slew-rate control PADCTRL_SLEW_RATE_CONTROL : RW Pad drive strength: for mA; for mA; for 8 mA; or for mA. PADCTRL_DRIVE_STRENGTH : RW Pull resistor: for none; for weak pull-up; for weak pull-down; or for weak bus-keep. PADCTRL_PULL RW Set to to enable the input receiver PADCTRL_RECEIVER_ENABLE xD: Padcontrol LPDDR WE_N D. Padcontrol LPDDR CAS_N PADCTRL_CAS_N 0xD004 When LPDDR is enabled, this register controls the PAD properties for the CAS_N pin Bits Perm Init Description Identier : RO - Reserved 6 RW Set to to enable the schmitt trigger PADCTRL_SCHMITT_TRIGGER_ENABLE RW Set to to enable slew-rate control PADCTRL_SLEW_RATE_CONTROL : RW Pad drive strength: for mA; for mA; for 8 mA; or for mA. PADCTRL_DRIVE_STRENGTH : RW Pull resistor: for none; for weak pull-up; for weak pull-down; or for weak bus-keep. PADCTRL_PULL RW Set to to enable the input receiver PADCTRL_RECEIVER_ENABLE xD: Padcontrol LPDDR CAS_N D.8 Padcontrol LPDDR RAS_N PADCTRL_RAS_N 0xD005 When LPDDR is enabled, this register controls the PAD properties for the RAS_N pin 8 |
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