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FS32R274VBK2MMM Datasheet(PDF) 14 Page - NXP Semiconductors |
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FS32R274VBK2MMM Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 78 page ![]() Table 7. Device operating conditions (continued) Symbol Parameter Conditions Min Typ Max1 Unit TJ11 Junction temperature — –40 — 150 °C FXTAL XOSC Crystal Frequency13 — — 40 — MHz AFE Bypass Modes Only Single-Ended External Clock14 EXTALclk EXTAL external clock frequency 40 MHz Vinxoscjit EXTAL external clock Cycle to Cycle Jitter (RMS) — — — 2.515 ps Vinxoscclkvil EXTAL external clock input low voltage — 0 — 0.4 V Vinxoscclkvih EXTAL external clock input high voltage — 1 — 1.23 V tr/tf Rise/fall time of EXTAL external clock input 1 ns tdc Duty Cycle of EXTAL external clock input 47 50 53 % Differential LVDS External Clock LVDSclk LVDS external clock frequency 40 MHz LVDSVinxoscclk LVDS external clock input voltage 0 1.36 V LVDSVinxoscclk(p-p) LVDS external clock input voltage (peak-peak) Voltage driven, AC coupled Differential 0.45 0.70 1.12 V LVDSIinxoscclk LVDS external clock input current Current driven, DC coupled. 3.0 3.5 4.0 mA LVDSVinxoscjit LVDS external clock Jitter (RMS) 15 2.5 ps tr /tf Rise/fall time of LVDS external clock input 20% - 80% 1.5 ns tdcLVDS Duty Cycle of LVDS external clock input 47 50 53 % 1. Full functionality cannot be guaranteed when voltages are out of the recommended operating conditions. 2. Min voltage takes into account the LVD variation. 3. Max voltage takes into account HVD variation. 4. Aurora supply must connect to core supply voltage at board level. 5. The ground connection for the VDD_HV_FLA is shared with VSS. 6. Supply range does not take into account HVD levels. Full range can be achieved after power-up, if HVD is disabled. See Voltage regulator electrical characteristics section for details. 7. Around common mode voltage of 0.7 V. Input voltage cannot exceed 1.4 V prior to AFE start-up completion (VREF and VREGs on and LVDs cleared). 8. SDADC input voltage full scale is 1.2 Vpp 9. On channels shared between ADC0 and 1, VDD_HV_ADCREFx is the lower of VDD_HV_ADCREF0/1. 10. VDD_LV_DPHY supply should be shorted to core supply voltage VDD on board. Refer to AN5251. Contact your NXP sales representative for details. General S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 14 NXP Semiconductors |
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