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FS32R274VBK2MMM Datasheet(PDF) 46 Page - NXP Semiconductors |
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FS32R274VBK2MMM Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 78 page  9.2 FlexRay timing parameters This section provides the FlexRay interface timing characteristics for the input and output signals. These numbers are recommended per the FlexRay Electrical Physical Layer Specification, Version 3.0.1, and subject to change per the final timing analysis of the device. 9.2.1 TxEN dCCTxENRISE dCCTxENFALL 20 % 80 % TxEN Figure 17. FlexRay TxEN signal Table 37. TxEN output characteristics1 Name Description Min Max Unit dCCTxENRISE25 Rise time of TxEN signal at CC — 9 ns dCCTxENFALL25 Fall time of TxEN signal at CC — 9 ns dCCTxEN01 Sum of delay between Clk to Q of the last FF and the final output buffer, rising edge — 25 ns dCCTxEN10 Sum of delay between Clk to Q of the last FF and the final output buffer, falling edge — 25 ns 1. All parameters specified for VDD_HV_IOx = 3.3 V -5%, +10%, TJ = –40 °C / 150 °C, TxEN pin load maximum 25 pF. Communication modules S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 46 NXP Semiconductors |
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