FS32R274VBK2MMM datasheet(76/78 Pages) NXP

76 / 78 page

It should be noted that LVD and HVD detectors on VDD supply are disabled by default

in external regulation mode for preventing a conflict with external regulator operation but

they can be enabled by software once design is powered up.

While designing the system, it is important to ensure that AFE supplies are powered up

before data is sent on its input pads.

Pinouts

19.1 Package pinouts and signal descriptions

For package pinouts and signal descriptions, refer to the Reference Manual.

20 Revision History

Table 58. Revision History

Revision

Date

Description

Rev 4

May, 2018

• Removed section "4.1 Introduction".

• Removed section "3.2 Format".

• In Fields, removed figure "Commercial product code structure".

• In Nexus Aurora debug port timing, added tEVTIPW row.

• In Ethernet switching specifications changed the following:

• Updated the figure RMII/MII serial management channel timing diagram.

• In Ethernet MDIO timing table changed MDC10 Min value and MDC11 Max value.

• Extensively updated Table 32.

• In Table 7, changed Vinxoscclkvih Max value from 1.2 to 1.23.

• In Table 25, added rows for the symbols tsampleC, tsampleS,tsampleBG, and tsampleTS.

• In Table 6, changed VINA maximum value to 6.0.

• Added the following footnotes in Absolute maximum ratings :

• The maximum value limits of injection current and input voltage both must be

followed together for proper device operation.

• The maximum value of 10 mA applies to pulse injection only. DC current injection is

limited to a maximum of 5 mA.

• In Table 7, changed VINA maximum value to VDD_HV_ADCREFx.

• In Table 2 :

• Changed part from FS32R274KBK2MMM to FS32R274KSK2MMM and changed

configuration from "B" to "S"

• Changed part from FS32R274KBK2VMM to FS32R274KSK2VMM and changed

configuration from "B" to "S"

• Added "B or S" to Table 3

Rev 5

July 03,

2018

• In Table 6, Removed footnote on IINJPAD.

Rev 5

April 30,

2019

• In Table 1, added information for 266 MHz frequency parts .

• In Table 2, added the rows for "FS32R274JSK2MMM", "FS32R264KBK0MMM",

"FS32R264KCK0MMM", "FS32R264JBK0MMM" and "FS32R264JCK0MMM".

• Added the feature changes for S32R264 with respect to S32R274 in Feature list.

Table continues on the next page...

Pinouts

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

NXP Semiconductors

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