FS32R274VBK2MMM datasheet(24/78 Pages) NXP

24 / 78 page

Table 17. Aurora LVDS driver electrical characteristics (continued)

Symbol

Parameter1

Value

Unit

Min

Typ

Max

RV_L

Terminating Resistance (external)

100

101

Ohms

Parasitic Capacitance (pad + bondwire + pin)

Parasitic Inductance

STARTUP

TSTRT_BIAS

Bias startup time

—

µs

TSTRT_TX

Transmitter startup time2

—

µs

TSTRT_RX

Receiver startup time2

—

µs

LVDS_RXOUT3

Receiver o/p duty cycle

1. Conditions for these values are VDD_LV_IO_AURORA = 1.19V to 1.32V, TJ = –40 / 150 °C

2. Startup time is defined as the time taken by LVDS current reference block for settling bias current after its pwr_down

(power down) has been deasserted. LVDS functionality is guaranteed only after the startup time.

3. Receiver o/p duty cycle is measured with 1.25 Gbps, 50% duty cycle, max 1 ns rise/fall time, 100 mV voltage swing signal

applied at the receiver input.

5.4 Reset pad electrical characteristics

The device implements a dedicated bidirectional RESET_B pin.

VIL

VDD_HV_IOx

device reset forced by RESET_B

VDDMIN

RESET_B

VIH

device start-up phase

Figure 4. Start-up reset requirements

I/O Parameters

S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021

NXP Semiconductors

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