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FS32R274VBK2MMM Datasheet(PDF) 17 Page - NXP Semiconductors |
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FS32R274VBK2MMM Datasheet(HTML) 17 Page - NXP Semiconductors |
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17 / 78 page ![]() Table 9. Voltage regulator electrical specifications (continued) Symbol Parameter Conditions Min Typ Max Unit FSMPS Internal switched regulator operating frequency without modulation Untrimmed 0.65 1.00 1.35 MHz Trimmed 0.93 1.00 1.07 MHz FSMPS-M7.5 Internal switched regulator frequency modulation — — 7.5 — % FSMPS-M15 — — 15 — % FSMPS-M30 — — 30 — % VREGSWPUP Internal switched regulator gate-driver pull- up resistance2 — — — — — VREF_BG_T PMC bandgap reference voltage for SARADC Trimmed 1.20 1.22 1.237 V Vih (VREG_POR_B) VREG_POR_B pin High Voltage level — 0.7 x VDD_H V_PMU — VDD_H V_PMU + 0.3 V Vil (VREG_POR_B) VREG_POR_B pin Low Voltage level — -0.3 — 0.3 x VDD_H V_PMU V LVDAFER Low Voltage Detection 3.3V Release (AFE VDD_HV_DAC and VDD_HV_RAW supplies) 2.75 2.80 2.90 V LVDAFEE Low Voltage Detection 3.3V Engage (AFE VDD_HV_DAC and VDD_HV_RAW supplies) 2.68 2.77 2.86 V 1. Min/Max includes transient load conditions. Steady state voltage is within the core supply operating specifications. 2. There is a strong pull up from VREG_SWP to VDD_HV_REG3V8 which is connected when SMPS is disabled. The pullup has resistance less than 1 Kohm, therefore VREG_SWP should not be connected to ground if unused. General S32R274/S32R264 Series Data Sheet, Rev. 6, 06/2021 NXP Semiconductors 17 |
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