5.8 Switching Characteristics - 250 kbps

250-kbps (THVD2410V-EP with SLR = VIO) over recommended operating conditions. All typical values are at 25°C and

supply voltage of VCC = 5 V , VIO = 3.3 V, unless otherwise noted. (1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Driver

tr, tf

Differential output rise/fall time

VCC = 3 to 3.6 V, Typical at 3.3V

RL = 54 Ω, CL = 50 pF

See Figure 6-3

450

560

1200

ns

VCC = 4.5 to 5.5 V, Typical at 5 V

500

625

1200

ns

tPHL, tPLH

Propagation delay

VCC = 3 to 3.6 V, Typical at 3.3V

500

720

ns

VCC = 4.5 to 5.5 V, Typical at 5 V

540

770

ns

tSK(P)

Pulse skew, |tPHL – tPLH|

VCC = 3 to 3.6 V, Typical at 3.3V

10

70

ns

VCC = 4.5 to 5.5 V, Typical at 5 V

10

70

ns

tPHZ, tPLZ

Disable time

RE = X

See Figure 6-4

and Figure 6-5

40

75

ns

tPZH, tPZL

Enable time

RE = 0 V

70

280

ns

RE = VIO

2.5

4.5

µs

tSHDN

Time to shutdown

RE = VIO

50

500

ns

Receiver

tr, tf

Output rise/fall time

CL = 15 pF

See Figure 6-6

7

20

ns

tPHL, tPLH

Propagation delay

800

1270

ns

tSK(P)

Pulse skew, |tPHL – tPLH|

5

45

ns

tPHZ, tPLZ

Disable time

DE = X

30

40

ns

tPZH(1)

Enable time

VIO = 3 V to 3.6 V; DE = VIO

See Figure 6-7

90

120

ns

VIO = 1.65 V to 1.95 V, DE = VIO

100

130

ns

tPZL(1)

VIO = 3 V to 3.6 V; DE = VIO

900

1320

ns

VIO = 1.65 V to 1.95 V; DE = VIO

900

1320

ns

tPZH(2),

tPZL(2)

Enable time

DE = 0 V

See Figure 6-8

3.3

5.4

μs

tD(OFS)

Delay to enter fail-safe operation

CL = 15 pF

See Figure 6-9

7

11

18

μs

tD(FSO)

Delay to exit fail-safe operation

540

800

1260

ns

tSHDN

Time to shutdown

DE = 0 V

See Figure 6-8

50

500

ns

(1)

A, B are driver output and receiver input terminals for Half duplex devices; A/B are Receiver input, Y/Z are driver output terminals for

Full duplex device

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THVD2410V-EP, THVD2450V-EP, THVD2452V-EP

SLLSFQ9B – MAY 2024 – REVISED OCTOBER 2024

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