THVD2452VDREP datasheet(16/40 Pages) TI

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VOD

tPLH

tPHL

90%

50 %

10 %

50%

3 V

VOH

VOL

0 V

Input

Generator

50 Ÿ

1.5V

0 V

CL=15 pF

Figure 6-6. Measurement of Receiver Output Rise and Fall Times and Propagation Delays

tPHZ

50 %

Vcc

0 V

VOH

90 %

50 %

10 %

VOL

VCC

tPLZ

tPZL(1)

tPZH(1)

D at Vcc

S1 to GND

Input

Generator

CL=15 pF

0V or Vcc

Vcc

1 k

S 1

D at 0V

S1 to Vcc

Figure 6-7. Measurement of Receiver Enable/Disable Times With Driver Enabled

50%

Vcc

§ 0V

VOH

50%

VOL

VCC

tPZL(2)

tPZH(2)

A at 1.5V

B at 0V

S1 to GND

A at 0V

B at 1.5V

S1 to VCC

50%

Input

Generator

50Ÿ

CL= 15 pF

0V or 1.5 V

Vcc

1 kŸ

1.5 V or 0 V

50%

90%

10%

tPLZ

tPHZ

Figure 6-8. Measurement of Receiver Enable Times With Driver Disabled

CL= 15 pF

VA = 0 V or -750 mV

VB = 0 V or +750 mV

0 V

VA - VB

-1.5 V

0 V

VCC

VCC / 2

tD(OFS)

tD(FSO)

Figure 6-9. Measurement of Fail-Safe Delay

THVD2410V-EP, THVD2450V-EP, THVD2452V-EP

SLLSFQ9B – MAY 2024 – REVISED OCTOBER 2024

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THVD2452VDREP Datasheet(PDF) 16 Page - Texas Instruments

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