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THVD2452VDREP Datasheet(PDF) 18 Page - Texas Instruments |
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THVD2452VDREP Datasheet(HTML) 18 Page - Texas Instruments |
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18 / 40 page ![]() 7.3.2 Integrated IEC ESD and EFT Protection Internal ESD protection circuits protect the transceivers against electrostatic discharges (ESD) according to IEC 61000-4-2 of up to ±12kV and against electrical fast transients (EFT) according to IEC 61000-4-4 of up to ±4kV. THVD24xxV-EP ESD structures help to limit voltage excursions and recover from them quickly that they allow EFT Criterion A at the system level (no data loss when transient noise is present). 7.3.3 Driver Overvoltage and Overcurrent Protection The THVD24xxV-EP drivers are protected against any DC supply shorts in the range of -70V to +70V. The devices internally limit the short circuit current to ±250mA to comply with the TIA/EIA-485A standard. In addition, a fold-back current limiting circuit further reduces the driver short circuit current to less than ±5mA if the output fault voltage exceeds |±25V|. All devices feature thermal shutdown protection that disables the driver and the receiver if the junction temperature exceeds the TSHDN threshold due to excessive power dissipation. 7.3.4 Enhanced Receiver Noise Immunity The differential receivers of THVD24xxV-EP feature fully symmetric thresholds to maintain duty cycle of the signal even with small input amplitudes. In addition, 250mV (typical) hysteresis provides noise immunity. 7.3.5 Receiver Fail-Safe Operation The receivers are fail-safe to invalid bus states caused by the following: • Open bus conditions, such as a disconnected connector • Shorted bus conditions, such as cable damage shorting the twisted-pair together • Idle bus conditions that occur when no driver on the bus is actively driving In any of these cases, the receiver outputs a fail-safe logic high state if the input amplitude stays for longer than tD(OFS) at less than |VTH_FSH|. 7.3.6 Low-Power Shutdown Mode Driving DE low and RE high for longer than 500ns puts the devices into the shutdown mode. If either DE goes high or RE goes low, the counters reset. The devices does not enter the shutdown mode if the enable pins are in disable state for less than 50ns. This feature prevents the devices from accidentally going into shutdown mode due to skew between DE and RE. THVD2410V-EP, THVD2450V-EP, THVD2452V-EP SLLSFQ9B – MAY 2024 – REVISED OCTOBER 2024 www.ti.com 18 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: THVD2410V-EP THVD2450V-EP THVD2452V-EP |
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