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TMP89FS60 Datasheet(PDF) 66 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 66 Page - Toshiba Semiconductor |
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66 / 410 page  Page 52 3. Interrupt Control Circuit 3.3 Interrupt Enable Register (EIR) TMP89FS60 RA003 Note 1: IL3 is a read-only register. Writing the register does not affect interrupt latch. Note 2: In the main program, before manipulating an interrupt latch (IL), be sure to clear the interrupt master enable flag (IMF) to "0" (Disable interrupt by DI instruction). Then set the IMF to "1" as required after operating the IL (Enable interrupt by EI instruction). In the interrupt service routine, the IMF becomes "0" automatically and need not be cleared to "0" normally. However, if using multiple interrupt in the interrupt service routine, manipulate the IL before setting the IMF to "1". Note 3: Do not clear IL with read-modify-write instructions such as bit operations. Note 4: When a read instruction is executed on ILL, bits 0 to 2 are read as "0". Other unused bits are read as "0". Interrupt latch (ILL) ILL 76543 210 (0x0FE0) Bit Symbol IL7 IL6 IL5 IL4 IL3 - - - Read/Write R/W R/W R/W R/W RRRR After reset 00000 000 Function INTTXD0 INTRXD0 / INTSIO0 INTTBT INTWUC INTWDT Interrupt latch (ILH) ILH 76543 210 (0x0FE1) Bit Symbol IL15 IL14 IL13 IL12 IL11 IL10 IL9 IL8 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W After reset 00000 000 Function INTSBI0/ INTSIO0 INTTCA0 INTTC01 INTTC00 INTRTC INTADC INTVLTD INT5 Interrupt latch (ILE) ILE 76543 210 (0x0FE2) Bit Symbol IL23 IL22 IL21 IL20 IL19 IL18 IL17 IL16 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W After reset 00000 000 Function INTTXD1 INTRXD1/ INTSIO1 INTTCA1 INT4 INT3 INT2 INT1 INT0 Interrupt latch (ILD) ILD 76543 210 (0x0FE3) Bit Symbol ---- IL27 IL26 IL25 IL24 Read/Write RRRR R/W R/W R/W R/W After reset 00000 000 Function INTTXD2 INTRXD2 INTTC03 INTTC02 IL27 to IL4 Interrupt latch Read Write 0: 1: No interrupt request Interrupt request Clears the interrupt request (Notes 2 and 3) Does not clear the interrupt request (Interrupt is not set by writing "1".) IL3 0: 1: No interrupt request Interrupt request - |
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