TMP89FS60 datasheet(26/410 Pages) TOSHIBA

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Page 12

2. CPU Core

2.2 Memory space

TMP89FS60

RA001

2.2.1.3

Flash

The Flash is mapped to 0x1000 to 0xFFFF in the code area after reset release.

2.2.2

Data area

The data area stores the data to be accessed as sources and destinations of transfer and calculation instruc-

tions.

The SFR, the RAM, the BOOTROM and the FLASH are mapped in the data area.

Note: Only the first 2 Kbytes of the BOOTROM are mapped in the memory map, except in the serial PROM mode.

Figure 2-2 Memory Map in the Data Area

Flash memory control register 2

FLSCR2

76543

210

(0x0FD1)

Bit Symbol

CR1EN

Read/Write

After reset

*******

CR1EN

FLSCR1 register

enable/disable control

0xD5

Others

Enable a change in the FLSCR1 setting

Reserved

0x0000

SFR1

(64 bytes)

SFR1

(64 bytes)

0x003F

0x0040

RAM

(3072 bytes)

RAM

(3072 bytes)

0x0C3F

0xFF is read

0x0E40

SFR3

(192 bytes)

SFR3

(192 bytes)

0x0EFF

0x0F00

SFR2

(256 bytes)

SFR2

(256 bytes)

0x0FFF

0x1000

BOOTROM

(2048 bytes)

0x17FF

0x1800

Flash

(61440 bytes)

Flash

(59392 bytes)

0xFFFF

Immediately after re-

set release

When the

BOOTROM is

mapped in the data

area

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