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TMP89FS60 Datasheet(PDF) 81 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 81 Page - Toshiba Semiconductor |
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81 / 410 page  Page 67 TMP89FS60 RA000 Note 4: The contents of EINTCRx<INTxLVL> are updated each time an interrupt request signal is generated. Note 5: Bits 7 to 5 of EINTCR4 are read as "0". 4.3 Function The condition for generating interrupt request signals and the noise cancel time can be set for external interrupts 1 to 4. The condition for generating interrupt request signals and the noise cancel time are fixed for external interrupts 0 and 5. Note 1: fcgck, Gear clock [Hz]; fs, low frequency clock [Hz]; fspl, Sampling interval [Hz] 4.3.1 Low power consumption function External interrupts have a function that saves power by using the low power consumption register (POFFCR3) when they are not used. Setting POFFCR3<INTxEN> to "0" stops (disables) the basic clock for external interrupts and helps save power. Note that this makes external interrupts unavailable. Setting POFFCR3<INTxEN> to "1" supplies (enables) the basic clock for external interrupts and makes external interrupts available. After reset, POFFCR3<INTxEN> is initialized to "0" and external interrupts become unavailable. When using the external interrupt function for the first time, be sure to set POFFCR3<INTxEN> to "1" in the initial setting of software (before operating the external interrupt control registers). Note:Interrupt request signals may be generated when INTxEN is changed. Before changing INTxEN, clear the cor- responding interrupt enable register to "0" to disable the generation of interrupt. When the operation mode is changed from NORMAL1/2 or IDLE1/2 to SLOW1/2 or SLEEP1, wait 12/fs [s] after the operation mode is changed and clear the interrupt latch. And when the operation mode is changed from SLOW1/2 or SLEEP1 to NORMAL1/2 or IDLE1/2, wait 2/fcgck+3/fspl [s] after the operation mode is changed and clear the interrupt latch. Table 4-1 External Interrupts Source Pin Enable conditions Interrupt request signal generated at External interrupt pin input signal width and noise removal NORMAL1/2, IDLE1/2 SLOW1/2, SLEEP1 INT0 INT0 IMF AND EF16 = 1 Falling edge Less than 1/fcgck: Noise More than 1/fcgck and less than 2/ fcgck: Indeterminate More than 2/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal INT1 INT1 IMF AND EF17 = 1 Falling edge Rising edge Both edges Less than 2/fspl: Noise More than 2/fspl and less than 3/fspl+1/ fcgck: Indeterminate More than 3/fspl+1/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal INT2 INT2 IMF AND EF18 = 1 Falling edge Rising edge Both edges Less than 2/fspl: Noise More than 2/fspl and less than 3/fspl+1/ fcgck: Indeterminate More than 3/fspl+1/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal INT3 INT3 IMF AND EF19 = 1 Falling edge Rising edge Both edges Less than 2/fspl: Noise More than 2/fspl and less than 3/fspl+1/ fcgck: Indeterminate More than 3/fspl+1/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal INT4 INT4 IMF AND EF20 = 1 Falling edge Rising edge Both edges "H" level Less than 2/fspl: Noise More than 2/fspl and less than 3/fspl+1/ fcgck: Indeterminate More than 3/fspl+1/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal INT5 INT5 IMF AND EF8 = 1 Falling edge Less than 1/fcgck: Noise More than 1/fcgck and less than 2/ fcgck: Indeterminate More than 2/fcgck: Signal Less than 4/fs: Noise More than 4/fs and less than 8/fs: Inde- terminate More than 8/fs: Signal |
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