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TMP89FS60 Datasheet(PDF) 123 Page - Toshiba Semiconductor |
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TMP89FS60 Datasheet(HTML) 123 Page - Toshiba Semiconductor |
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123 / 410 page  Page 109 TMP89FS60 RA005 8.3.5 Port P5 (P57 to P50) Port P5 is an 8-bit input/output port that can be set to input or output for each bit individually, and it is also used as the analog input. Figure 8-7 Port P5 Table 8-12 Port P5 P57P56 P55P54 P53 P52 P51P50 Secondary function AIN15 AIN14 AIN13 AIN12 AIN11 AIN10 AIN9 AIN8 Output latch (for each bit) P5DR write P5i R Note1 : R = 100 Ω (typ.) Note2 : i = 0 to 7 AD Peripheral functions P5PRD read AINi enable signal ADCCR1<AINEN> Function control (for each bit) Input/output control (for each bit) P5FC write P5CR write VDD AINi SYSCR1<STOP> SYSCR1<OUTEN> Reset signal |
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