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TMP89FS60 Datasheet(PDF) 326 Page - Toshiba Semiconductor

Part # TMP89FS60
Description  8 Bit Microcontroller
PDF  410 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP89FS60 Datasheet(HTML) 326 Page - Toshiba Semiconductor

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Page 312
21. Flash Memory
TMP89FS60
RA003
To access the flash memory again after setting FLSSTB<FSTB> to "1", set FLSSTB<FSTB> to "0" by using
a program allocated to RAM. If the flash memory is accessed with FLSSTB<FSTB> set to "1," a flash standby
reset will occur.
If an interrupt occurs when the interrupt vector is assigned to the flash memory area (SYSCR3<RVCTR> =
"0" is effective), FSTB is automatically initialized to "0", and then the interrupt vector of the flash memory
area is read. If an interrupt occurs when the interrupt vector is assigned to the RAM area (SYSCR3<RVCTR>
= "1" is effective), FSTB is not cleared to "0", and then the interrupt vector of the RAM area is read. In this
case, the RAM area should be designated as a referential address of interrupt vector. If the flash memory area is
designated as a referential address of interrupt vector, a flash standby reset occurs after an interrupt is gener-
ated.
Operations performed by controlling the FLSSTB register are described below
(1 and 2 show the operations performed by a program residing in the flash memory, and 3 through 8 show the
operations performed by a program transferred to RAM):
1. Transferring a control program of the FLSSTB register to RAM
2. Invoking a program in the RAM area
3. Disabling (DI) the interrupt master enable flag (IMF
← "0")
4. Setting FLSSTB<FSTB> to "1"
5. Executing a user program
6. Repeatedly performing the operation described in 5 above until the request to return to the flash mem-
ory is detected
7. Setting FLSSTB<FSTB> to "0"
8. Returning to the flash memory area
21.2.6 Port input control register (SPCR<PIN0, PIN1>)
In serial PROM mode, the input levels of all ports, except the ports RXD0 and TXD0 used in serial PROM
mode, are physically fixed after a reset is released. This is designed to prevent a penetration current from flow-
ing through unused ports (port inputs and functional peripheral inputs, which are also used as ports, are dis-
Example: Case in which FLSSTB is configured in the RAM area
cRAMStartAdd
equ 0x0200
; Start address of RAM
main section code abs = 0x1000
; #### Operation for transferring a program to RAM #### (STEP1)
LD
HL,cRAMStartAdd
LD
IX,sRAMprogStart
sRAMLOOP:
LD
A,(IX)
; Transferring a program from sRAMprogStart to
LD
(HL),A
; sRAMprogEnd to cRAMStartAdd
INC
HL
INC
IX
CMP
IX,sRAMprogEnd
JNZ,sRAMLOOP
CALL
cRAMStartAdd
; Call the RAM program (step 2)
:
:
; Executing a user program
::
JXXXX
; #### Program executed in RAM ####
sRAMprogStart:
DI
; Interrupt disable (step 3)
LD
(FLSSTB),0x01
; FSTB="1" (step 4)
:
:
; Executing a user program (step 5)
::
::
LD
(FLSSTB),0x00
; FSTB="0" (step 7)
RET
; Returning to the flash memory area (step 8)
sRAMprogEnd
NOP



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