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ADS8699IPWR Datasheet(PDF) 2 Page - Texas Instruments

Part # ADS8699IPWR
Description  ADS869x 18-Bit, High-Speed, Single-Supply, SAR ADC Data Acquisition System With Programmable, Bipolar Input Ranges
PDF  74 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS8699IPWR Datasheet(HTML) 2 Page - Texas Instruments

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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................4
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Timing Requirements: Conversion Cycle..................10
6.7 Timing Requirements: Asynchronous Reset.............10
6.8 Timing Requirements: SPI-Compatible Serial
Interface...................................................................... 10
6.9 Timing Requirements: Source-Synchronous
Serial Interface (External Clock)..................................11
6.10 Timing Requirements: Source-Synchronous
Serial Interface (Internal Clock)................................... 11
6.11 Timing Diagrams..................................................... 12
6.12 Typical Characteristics............................................ 15
7 Detailed Description......................................................22
7.1 Overview................................................................... 22
7.2 Functional Block Diagram......................................... 22
7.3 Feature Description...................................................23
7.4 Device Functional Modes..........................................35
7.5 Programming............................................................ 40
7.6 Register Maps...........................................................48
8 Application and Implementation.................................. 57
8.1 Application Information............................................. 57
8.2 Typical Application.................................................... 57
9 Power Supply Recommendations................................61
9.1 Power Supply Decoupling.........................................61
9.2 Power Saving............................................................61
10 Layout...........................................................................63
10.1 Layout Guidelines................................................... 63
10.2 Layout Example...................................................... 64
11 Device and Documentation Support..........................65
11.1 Documentation Support.......................................... 65
11.2 Receiving Notification of Documentation Updates.. 65
11.3 Support Resources................................................. 65
11.4 Trademarks............................................................. 65
11.5 Electrostatic Discharge Caution.............................. 65
11.6 Glossary.................................................................. 65
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (October 2018) to Revision B (March 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document .................1
• Changed Applications section............................................................................................................................ 1
• Changed AIN_P, AIN_GND to GND specification in Absolute Maximum Ratings table .................................... 5
• Updated specification of Input Overvoltage Protection Circuit, VOVP parameter, to ±15 V for test condition
AVDD = floating.................................................................................................................................................. 6
• Changed Standard SPI Timing Protocol figures............................................................................................... 46
• Changed DEVICE_ADDR[3:0] type to R/W from R in DEVICE_ID_REG Register ......................................... 48
• Changed the description of PAR_EN bit in DATAOUT_CTL_REG Register ................................................... 52
Changes from Revision * (December 2016) to Revision A (October 2018)
Page
• Deleted per channel from ALARM → High, Low Threshold bullet in Features section...................................... 1
• Deleted WQFN package option from document................................................................................................. 1
• Deleted RUM (WQFN) information from Pin Configuration and Functions section............................................ 4
• Deleted offers a low impedance of 30 kΩ from footnotes 2 and 3 in Absolute Maximum Ratings table ........... 5
• Deleted RUM (WQFN) column from Thermal Information table......................................................................... 5
• Changed test conditions of Input Overvoltage Protection Circuit, VOVP parameter............................................6
• Deleted WQFN row from VREFIO and dVREFIO/dTA parameters..........................................................................6
• Deleted multichannel reference from Overview section................................................................................... 22
• Changed the input voltage range for each analog channel to the input voltage range in Analog Input Structure
section.............................................................................................................................................................. 23
• Changed Input Overvoltage Protection Limits When AVDD = 5 V table name from Input Overvoltage
Protection Limits When AVDD = 5 V or Offers a Low Impedance of 30 kΩ .....................................................23
• Changed AVDD is floating with an impedance 30 kΩ to AVDD is floating in Input Protection Circuit section.. 23
ADS8691, ADS8695, ADS8699
SBAS777B – DECEMBER 2016 – REVISED MARCH 2021
www.ti.com
2
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: ADS8691 ADS8695 ADS8699



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