ADS8699IPWR datasheet(33/74 Pages) TI2

33 / 74 page

7.3.9 Alarm Features

The device features an active-high alarm output on the ALARM/SDO-1/GPO pin, provided that the pin is

configured for alarm functionality. To enable the ALARM output on the multi-function pin, se the

SDO1_CONFIG[1:0] bits of the SDO_CTL_REG register to 01b (see the SDO_CTL_REG register).

The device features two types of alarm functions: an input alarm and an AVDD alarm.

• For the input alarm, the voltage at the input of the ADC is monitored and compared against user-

programmable high and low threshold values. The device sets an active high alarm output when the

corresponding digital value of the input signal goes beyond the high or low threshold set by the user; see the

Input Alarm section for a detailed explanation of the input alarm feature functionality.

• For the AVDD alarm, the analog supply voltage (AVDD) of the ADC is monitored and compared against the

specified typical low threshold (4.7 V) and high threshold (5.3 V) values of the AVDD supply. The device sets

an active high alarm output if the value of AVDD crosses the specified low (4.7 V) and high threshold (5.3 V)

values in either direction.

When the alarm functionality is turned on, both the input and AVDD alarm functions are enabled by default.

These alarm functions can be selectively disabled by programming the IN_AL_DIS and VDD_AL_DIS bits

(respectively) of the RST_PWRCTL_REG register.

Each alarm (input alarm or AVDD alarm) has two types of alarm flags associated with it: the active alarm flag

and the tripped alarm flag. All the alarm flags can be read in the ALARM_REG register. Both flags are set when

the associated alarm is triggered. However while the active alarm is cleared at the end of the current ADC

conversion (and set again if the alarm condition persists), the tripped flag is cleared only after ALARM_REG is

read.

The ALARM output flags are updated internally at the end of every conversion. These output flags can be read

during any data frame that the user initiates by bringing the CONVST/CS signal to a low level.

The ALARM output flags can be read in three different ways: either via the ALARM output pin, by reading the

internal ALARM registers, or by appending the ALARM flags to the data output.

• A high level on the ALARM pin indicates an over- or undervoltage condition on AVDD or on the analog input

channel of the device. This pin can be wired to interrupt the host input.

• The internal ALARM flag bits in the ALARM_REG register are updated at the end of conversion. After

receiving an ALARM interrupt on the output pin, the internal alarm flag registers can be read to obtain more

details on the conditions that generated the alarm.

• The alarm output flags can be selectively appended to the data output bit stream (see the

DATAOUT_CTL_REG register for configuration details).

Figure 7-16 depicts a functional block diagram for the device alarm functionality.

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ADS8691, ADS8695, ADS8699

SBAS777B – DECEMBER 2016 – REVISED MARCH 2021

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ADS8699IPWR Datasheet(PDF) 33 Page - Texas Instruments