ADS8699IPWR datasheet(42/74 Pages) TI2

42 / 74 page

7.5.2 Input Command Word and Register Write Operation

Any data write operation to the device is always synchronous to the external clock provided on the SCLK pin.

The device allows either one byte or two bytes (equivalent to half a word) to be read or written during any device

programming operation. Table 7-5 lists the input commands supported by the device. The input commands

associated with reading or writing two bytes in a single operation are suffixed as HWORD.

For any HWORD command, the LSB of the 9-bit address is always ignored and considered as 0b. For example,

regardless whether address 04h or 05h is entered for any particular HWORD command, the device always

exercises the command on address 04h.

Table 7-5. List of Input Commands

OPCODE

B[31:0]

COMMAND

ACRONYM

COMMAND DESCRIPTION

00000000_000000000_

00000000_00000000

NOP

No operation

11000_xx_<9-bit address>_

<16-bit data>(1)

CLEAR_HWORD

•

Command used to clear any (or a group of) bits of a register.

•

Any bit marked 1 in the data field results in that particular bit of the specified register being

reset to 0, leaving the other bits unchanged.

•

Half-word command (that is, the command functions on 16 bits at a time).

•

LSB of the 9-bit address is always ignored and considered as 0b.(2)

11001_xx_<9-bit address>_

00000000_00000000

READ_HWORD

•

Command used to perform a 16-bit read operation.

•

Half-word command (that is, the device outputs 16 bits of register data at a time).

•

LSB of the 9-bit address is always ignored and considered as 0b.

•

Upon receiving this command, the device sends out 16 bits of the register in the next frame.

01001_xx_<9-bit address>_

00000000_00000000

READ

•

Same as the READ_HWORD except that only eight bits of the register (byte read) are

returned in the next frame.

11010_00_<9-bit address>_

<16-bit data>

WRITE

•

Half-word write command (two bytes of input data are written into the specified address).

•

LSB of the 9-bit address is always ignored and considered as 0b.

11010_01_<9-bit address>_

<16-bit data>

•

Half-word write command.

•

LSB of the 9-bit address is always ignored and considered as 0b.

•

With this command, only the MS byte of the 16-bit data word is written at the specified register

address. The LS byte is ignored.

11010_10_<9-bit address>_

<16-bit data>

•

Half-word write command.

•

LSB of the 9-bit address is always ignored and considered as 0b.

•

With this command, only the LS byte of the 16-bit data word is written at the specified register

address. The MS byte is ignored.

11011_xx_<9-bit address>_

<16-bit data>

SET_HWORD

•

Command used to set any (or a group of) bits of a register.

•

Any bit marked 1 in the data field results in that particular bit of the specified register being set

to 1, leaving the other bits unchanged.

•

Half-word command (that is, the command functions on 16 bits at a time).

•

LSB of the 9-bit address is always ignored and considered as 0b.

All other input command combinations

NOP

No operation

(1)

<9-bit address> is realized by adding a 0 at the MSB location followed by an 8-bit register address as defined in Table 7-10. The <9-bit

address> for register 0x04h is 0x0-0000-0100b.

(2)

An HWORD command operates on a set of 16 bits in the register map that is usually identified as two registers of eight bits each. For

example, the command 11000_xx_<0_0000_0101><16-bit data> is treated the same as the command 11000_xx_<0_0000_0100><16-

bit data> for bits 15:0 of the RST_PWRCTL_REG register.

All input commands (including the CLEAR_HWORD, WRITE, and SET_HWORD commands listed in Table 7-5)

used to configure the internal registers must be 32 bits long. If any of these commands are provided in a

particular data frame F, that command gets executed at the rising edge of the CONVST/CS signal.

ADS8691, ADS8695, ADS8699

SBAS777B – DECEMBER 2016 – REVISED MARCH 2021

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