ADS8699IPWR datasheet(26/74 Pages) TI2

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Table 7-3. Input Range Selection Bits Configuration

ANALOG INPUT RANGE

RANGE_SEL[3:0]

BIT 3

BIT 2

BIT 1

BIT 0

±3 × VREF

±2.5 × VREF

±1.5 × VREF

±1.25 × VREF

±0.625 × VREF

0–3 × VREF

0–2.5 × VREF

0–1.5 × VREF

0–1.25 × VREF

7.3.5 Second-Order, Low-Pass Filter (LPF)

In order to mitigate the noise of the front-end amplifier and gain resistors of the PGA, the AFE circuit of the

device features a second-order, antialiasing LPF at the output of the PGA. The magnitude and phase response

of the analog antialiasing filter are shown in Figure 7-5 and Figure 7-6, respectively. For maximum performance,

the –3-dB cutoff frequency for the antialiasing filter is typically set to 15 kHz. The performance of the filter is

consistent across all input ranges supported by the ADC.

Input Frequency (Hz)

-15

-12

-9

-6

-3

100

10k

100k

D058

±12.288 V

±10.24 V

±6.144 V

±5.12 V

±2.56 V

0-12.288 V

0-10.24 V

0-6.144 V

0-5.12 V

Figure 7-5. Second-Order LPF Magnitude

Response

Input Frequency (Hz)

-135

-90

-45

100

10k

100k

D059

± 12.288 V

± 10.24 V

± 6.144 V

± 5.12 V

± 2.56 V

0-12.288 V

0-10.24 V

0-6.144 V

0-5.12 V

Figure 7-6. Second-Order LPF Phase Response

7.3.6 ADC Driver

In order to meet the performance of the device at the maximum sampling rate, the sample-and-hold capacitors at

the input of the ADC must be successfully charged and discharged during the acquisition time window. This drive

requirement at the input of the ADC necessitates the use of a high-bandwidth, low-noise, and stable amplifier

buffer. Such an input driver is integrated in the front-end signal path of the analog input channel of the device.

7.3.7 Reference

The device can operate with either an internal voltage reference or an external voltage reference using the

internal buffer. The internal or external reference selection is determined by programming the INTREF_DIS bit of

the RANGE_SEL_REG register. The internal reference source is enabled (INTREF_DIS = 0) by default after

reset or when the device powers up. The INTREF_DIS bit must be programmed to logic 1 to disable the internal

reference source whenever an external reference source is used.

ADS8691, ADS8695, ADS8699

SBAS777B – DECEMBER 2016 – REVISED MARCH 2021

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