ADS8699IPWR datasheet(23/74 Pages) TI2

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7.3 Feature Description

7.3.1 Analog Input Structure

The device features a pseudo-differential input structure, meaning that the single-ended analog input signal is

applied at the positive input AIN_P and the negative input AIN_GND is tied to GND. Figure 7-1 shows the

simplified circuit schematic for the AFE circuit, including the input overvoltage protection circuit, PGA, low-pass

filter (LPF), and high-speed ADC driver.

PGA

1 M:

OVP

1 M:

OVP

nd-Order

LPF

ADC

Driver

ADC

AIN_P

AIN_GND

CONVST/CS

SCLK

SDI

SDO

Figure 7-1. Simplified Analog Front-End Circuit Schematic

The device can support multiple unipolar or bipolar, single-ended input voltage ranges based on the

configuration of the program registers. As explained in the RANGE_SEL_REG register, the input voltage range

can be configured to bipolar ±3 × VREF, ±2.5 × VREF, ±1.5 × VREF, ±1.25 × VREF, and ±0.625 × VREF or unipolar 0

to 3 × VREF, 0 to 2.5 × VREF, 0 to 1.5 × VREF and 0 to 1.25 × VREF. With the internal or external reference voltage

set to 4.096 V, the input ranges of the device can be configured to bipolar ranges of ±12.288 V, ±10.24 V, ±6.144

V, ±5.12 V, and ±2.56 V or unipolar ranges of 0 V to 12.288 V, 0 V to 10.24 V, 0 V to 6.144 V, and 0 V to 5.12 V.

The device samples the voltage difference (AIN_P – AIN_GND) between the analog input and the AIN_GND pin.

The device allows a ±0.1-V range on the AIN_GND pin. This feature is useful in modular systems where the

sensor or signal-conditioning block is further away from the ADC on the board and when a difference in the

ground potential of the sensor or signal conditioner from the ADC ground is possible. In such cases, running

separate wires from the AIN_GND pin of the device to the sensor or signal-conditioning ground is recommended.

In order to obtain optimum performance, the input currents and impedances along each input path are

recommended to be matched. The two single-ended signals to AIN_P and AIN_GND must be routed as

symmetrically as possible from the signal source to the ADC input pins.

If the analog input pin (AIN_P) to the device is left floating, the output of the ADC corresponds to an internal

biasing voltage. The output from the ADC must be considered as invalid if the device is operated with floating

input pins. This condition does not cause any damage to the device, which becomes fully functional when a valid

input voltage is applied to the pins.

7.3.2 Analog Input Impedance

The device presents a resistive input impedance ≥ 1 MΩ on each of the analog inputs. The input impedance is

independent of the ADC sampling frequency or the input signal frequency. The primary advantage of such high-

impedance inputs is the ease of driving the ADC inputs without requiring driving amplifiers with low output

impedance. Bipolar, high-voltage power supplies are not required in the system because this ADC does not

require any high-voltage, front-end drivers. In most applications, the signal sources or sensor outputs can be

directly connected to the ADC input, thus significantly simplifying the design of the signal chain.

In order to maintain the dc accuracy of the system, matching the external source impedance on the AIN_P input

pin with an equivalent resistance on the AIN_GND pin is recommended. This matching helps cancel any

additional offset error contributed by the external resistance.

7.3.3 Input Protection Circuit

The device features an internal overvoltage protection (OVP) circuit on each of the analog inputs. Use the

internal protection circuit only as a secondary protection scheme. The external protection devices in the end

application are highly recommended to be used to protect against surges, electrostatic discharge (ESD), and

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ADS8691, ADS8695, ADS8699

SBAS777B – DECEMBER 2016 – REVISED MARCH 2021

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ADS8699IPWR Datasheet(PDF) 23 Page - Texas Instruments

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