R7F100LLL3CFB datasheet(74/148 Pages) RENESAS

74 / 148 page

RL78/L23

2. Electrical Characteristics

R01DS0502EJ0110 Rev.1.10

Page 74 of 145

Oct 31, 2025

Note 1. This current flows into VDD.

Note 2. The listed currents apply when the high-speed on-chip oscillator, middle-speed on-chip oscillator, and high-speed system

clock are stopped.

Note 3. This current flows into the realtime clock (RTC). It does not include the operating current of the low-speed on-chip oscillator

or the XT1 oscillator. The supply current of the RL78 microcontrollers is the sum of either IDD1 or IDD2, and IRTC, when the

realtime clock is operating or in the HALT mode. When the low-speed on-chip oscillator is selected, IFIL should be included in

the supply current. IDD2 in the subsystem clock operation mode includes the operating current of the realtime clock.

Note 4. This current only flows to the 32-bit interval timer. It does not include the operating current of the low-speed on-chip oscillator

or the XT1 oscillator. The supply current of the RL78 microcontrollers is the sum of either IDD1 or IDD2, and IIT, when the 32-

bit interval timer is operating or in the HALT mode. When the low-speed on-chip oscillator is selected, IFIL should be included

in the supply current.

Note 5. This current only flows to the 8-bit interval timer. It does not include the operating current of the XT1 oscillator. The supply

current of the RL78 microcontrollers is the sum of either IDD1 or IDD2 and ITMT when the 8-bit interval timer is operating or in

the HALT mode. When the low-speed on-chip oscillator is selected, IFIL should be included in the supply current.

Note 6. This current only flows to the timer RJ. It does not include the operating current of the XT1 oscillator. The supply current of

the RL78 microcontrollers is the sum of either IDD1 or IDD2 and ITMRJ when the timer RJ is operating or in the HALT mode.

When the low-speed on-chip oscillator is selected, IFIL should be included in the supply current.

Note 7. This current only flows to the 16-bit timers KB40, KB41, and KB42. It does not include the operating current of the high-

speed on-chip oscillator. The supply current of the RL78 microcontrollers is the sum of either IDD1 or IDD2 and ITMKB when

the 16-bit timers KB40, KB41, and KB42 are operating or in the HALT mode. When the low-speed on-chip oscillator is

selected, IFIL should be included in the supply current.

Note 8. This current only flows to the external signal sampler. It does not include the operating current of the low-speed on-chip

oscillator, XT1 oscillator, or 8-bit interval timer. The supply current of the RL78 microcontrollers is the sum of either IDD1 or

IDD2 and IEXSD when the external signal sampler is operating or in the HALT mode. When the low-speed on-chip oscillator is

selected, IFIL should be included in the supply current.

Note 9. This current only flows to the watchdog timer. It includes the operating current of the low-speed on-chip oscillator. The supply

current of the RL78 microcontrollers is the sum of IDD1, IDD2 or IDD3 and IWDT when the watchdog timer is operating.

Note 10. This current only flows to the A/D converter. The supply current of the RL78 microcontrollers is the sum of IDD1 or IDD2 and

IADC when the A/D converter is operating or in the HALT mode.

Note 11. This current flows into AVREFP.

(TA = -40 to +105°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V)

(3/3)

Item

Symbols

Conditions

Min.

Typ.

Max.

Unit

LCD operating

current

ILCD1

Notes 1, 24,

External resistance

division method

fLCD = fSUB

LCD clock = 128 Hz

1/3 bias, four time slices

VDD = 5.0 V

VL4 = 5.00 V

0.02

µA

ILCD2Note 1 Internal voltage

boosting method

fLCD = fSUB

LCD clock = 128 Hz

1/3 bias, four time slices,

VL1 reference

VDD = 3.0 V

VL4 = 3.03 V

(VLCD4-0 = 04H)

0.74

µA

VDD = 5.0 V

VL4 = 5.01 V

(VLCD4-0 = 18H)

1.03

µA

fLCD = fSUB

LCD clock = 128 Hz

1/3 bias, four time slices,

VL2 referenceNote 26

VDD = 3.0 V

VL4 = 3.03 V

(VLCD4-0 = 04H)

0.63

µA

VDD = 5.0 V

VL4 = 5.03 V

(VLCD4-0 = 18H)

0.83

µA

ILCD3Note 1 Capacitor split method

fLCD = fSUB

LCD clock = 128 Hz

1/3 bias, four time slices,

VDD reference

VDD = 3.0 V

VL4 = 3.00 V

0.14

µA

fLCD = fSUB

LCD clock = 128 Hz

1/3 bias, four time slices,

VL4 reference

VDD = 5.0 V

VL4 = 3.04 V

0.63

µA

R7F100LLL3CFB Datasheet(PDF) 74 Page - Renesas Technology Corp

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