R7F100LLL3CFB datasheet(76/148 Pages) RENESAS

76 / 148 page

RL78/L23

2. Electrical Characteristics

R01DS0502EJ0110 Rev.1.10

Page 76 of 145

Oct 31, 2025

2.4

AC Characteristics

(TA = -40 to +105°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V)

(1/2)

Item

Symbols

Conditions

Min.

Typ.

Max.

Unit

Instruction cycle

(minimum instruction

execution time)

TCY

Main system clock

(fMAIN) operation

(high-speed main)

mode

1.8 V ≤ VDD ≤ 5.5 V

0.03125

µs

1.6 V ≤ VDD ≤ 1.8 V

0.25

µs

(low-speed main)

mode

1.8 V ≤ VDD ≤ 5.5 V

0.04167

µs

1.6 V ≤ VDD ≤ 1.8 V

0.25

µs

(low-power main)

mode

1.6 V ≤ VDD ≤ 5.5 V

0.5

µs

Subsystem clock (fSUB) operation

1.6 V ≤ VDD ≤ 5.5 V

26.041

30.5

31.3

µs

In the self

programming

mode

(high-speed main)

mode

1.8 V ≤ VDD ≤ 5.5 V

0.03125

µs

1.6 V ≤ VDD ≤ 1.8 V

0.5

µs

(low-speed main)

mode

1.8 V ≤ VDD ≤ 5.5 V

0.04167

µs

1.6 V ≤ VDD ≤ 1.8 V

0.5

µs

External system clock

frequency

fEX

1.8 V ≤ VDD ≤ 5.5 V

MHz

1.6 V ≤ VDD < 1.8 V

MHz

fEXS

38.4

kHz

External system clock

input

high-level width,

low-level width

tEXH,

tEXL

1.8 V ≤ VDD ≤ 5.5 V

1.6 V ≤ VDD < 1.8 V

120

tEXHS,

tEXLS

13.7

µs

TI00 to TI07 input

high-level width,

low-level width

tTIH,

tTIL

1/fMCK

+10

Timer RJ input cycle

TRJIO0, TRJIO1

2.7 V ≤ VDD < 5.5 V

100

1.8 V ≤ VDD < 2.7 V

300

1.6 V ≤ VDD < 1.8 V

500

Timer RJ Input

high-level width,

low-level width

tTJIH,

tTJIL

TRJIO0, TRJIO1

2.7 V ≤ VDD < 5.5 V

1.8 V ≤ VDD < 2.7 V

120

1.6 V ≤ VDD < 1.8 V

200

TO00 to TO07, TKBO00,

TKBO01, TKBO10,

TKBO11, TKBO20,

TKBO21, TRJIO0,

TRJIO1, TRJO0, and

TRJO1 output frequency

fTO

HS (high-speed main) mode,

LS (low-speed main) mode

4.0 V ≤ VDD ≤ 5.5 V

MHz

2.7 V ≤ VDD < 4.0 V

MHz

1.8 V ≤ VDD < 2.7 V

MHz

1.6 V ≤ VDD < 1.8 V

MHz

LP (low-power main) mode

1.6 V ≤ VDD ≤ 5.5 V

MHz

PCLBUZ0, PCLBUZ1

output frequency

fPCL

HS (high-speed main) mode,

LS (low-speed main) mode

4.0 V ≤ VDD ≤ 5.5 V

MHz

2.7 V ≤ VDD < 4.0 V

MHz

1.8 V ≤ VDD < 2.7 V

MHz

1.6 V ≤ VDD < 1.8 V

MHz

LP (low-power main) mode

1.6 V ≤ VDD < 5.5 V

MHz

R7F100LLL3CFB Datasheet(PDF) 76 Page - Renesas Technology Corp

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