R7F100LLL3CFB datasheet(82/148 Pages) RENESAS

82 / 148 page

RL78/L23

2. Electrical Characteristics

R01DS0502EJ0110 Rev.1.10

Page 82 of 145

Oct 31, 2025

2.5

Characteristics of the Peripheral Functions

AC Timing Test Points

2.5.1

Serial array unit

1. In UART communications with devices operating at same voltage levels

Note 1.

The transfer rate in the SNOOZE mode is within the range from 4800 to 9600 bps.

Note 2.

The maximum operating frequencies of the CPU/peripheral hardware clock (fCLK) are as follows.

Caution

Select the normal input buffer for the RxDq pin and the normal output mode for the TxDq pin by using port input

mode register (PIMg) and port output mode register (POMg).

(TA = -40 to +105°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V)

Item

Symbols

Conditions

(high-speed main)

mode

(low-speed main)

mode

(low-power main)

mode

Unit

Min.

Max.

Min.

Max.

Min.

Max.

Transfer rate

Note 1

1.6 V ≤ VDD ≤ 5.5 V

fMCK/6

bps

Theoretical value of the

maximum transfer rate

fMCK = fCLKNote 2

5.3

0.33

Mbps

HS (high-speed main) mode : 32 MHz (1.8 V ≤ VDD ≤ 5.5 V)

4 MHz (1.6 V ≤ VDD ≤ 5.5 V)

LS (low-speed main) mode : 24 MHz (1.8 V ≤ VDD ≤ 5.5 V)

4 MHz (1.6 V ≤ VDD ≤ 5.5 V)

LP (low-power main) mode : 2 MHz (1.6 V ≤ VDD ≤ 5.5 V)

VIH/VOH

VIL/VOL

VIH/VOH

Test points

VIL/VOL

R7F100LLL3CFB Datasheet(PDF) 82 Page - Renesas Technology Corp

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