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R7F100LLL3CFB Datasheet(PDF) 77 Page - Renesas Technology Corp |
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R7F100LLL3CFB Datasheet(HTML) 77 Page - Renesas Technology Corp |
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77 / 148 page ![]() RL78/L23 2. Electrical Characteristics R01DS0502EJ0110 Rev.1.10 Page 77 of 145 Oct 31, 2025 Remark fMCK: Timer array unit operating clock frequency To set this operating clock, use the CKSmn0 and CKSmn1 bits of the timer mode register mn (TMRmn) (m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7). (TA = -40 to +105°C, 1.6 V ≤ VDD ≤ 5.5 V, VSS = EVSS = 0 V) (2/2) Item Symbols Conditions Min. Typ. Max. Unit Interrupt input high-level width, low-level width tINTH, tINTL INTP0 to INTP7 1.6 V ≤ VDD ≤ 5.5 V 1 µs Key-input high-level width, low-level width tKRH, tKRL KR0 to KR7 1.8 V ≤ VDD ≤ 5.5 V 250 ns 1.6 V ≤ VDD < 1.8 V 1 µs RESET low-level width tRSL 10 µs |
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