R7F100LLL3CFB datasheet(95/148 Pages) RENESAS

95 / 148 page

RL78/L23

2. Electrical Characteristics

R01DS0502EJ0110 Rev.1.10

Page 95 of 145

Oct 31, 2025

Note 3.

The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid maximum transfer rate.

Expression for calculating the transfer rate when 2.7 V ≤ VDD < 4.0 V and 2.3 V ≤ Vb ≤ 2.7 V

Note 4.

This rate is calculated as an example when the conditions described in the Conditions column are met. See Note 3 above to

calculate the maximum transfer rate under conditions of the customer.

Note 5.

Use this rate with VDD ≥ Vb.

Note 6.

The smaller maximum transfer rate derived by using fMCK/6 or the following expression is the valid maximum transfer rate.

Expression for calculating the transfer rate when 1.8 V ≤ VDD < 3.3 V and 1.6 V ≤ Vb ≤ 2.0 V

Note 7.

This rate is calculated as an example when the conditions described in the Conditions column are met. See Note 6 above to

calculate the maximum transfer rate under conditions of the customer.

Caution

Select the TTL input buffer for the RxDq pin, and the N-ch open-drain output (withstand voltage of VDD) mode for

the TxDq pin by using the port input mode register (PIMg) and port output mode register (POMg). For VIH and VIL,

see the DC characteristics with the TTL input buffer selected.

Maximum transfer rate =

[bps]

Baud rate error (theoretical value) =

Transfer rate

× 2

(

)

× Number of transferred bits

Transfer rate

× 100 [%]

{-Cb

× Rb × In (1 -

)}

× 3

2.0

{-Cb

× Rb × In (1 -

)}

2.0

* This value is the theoretical value of the relative difference

between the transmission and reception sides.

Maximum transfer rate =

[bps]

Baud rate error (theoretical value) =

Transfer rate

× 2

(

)

× Number of transferred bits

Transfer rate

× 100 [%]

{-Cb

× Rb × In (1 -

)}

× 3

1.5

{-Cb

× Rb × In (1 -

)}

1.5

* This value is the theoretical value of the relative difference

between the transmission and reception sides.

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