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ST20-C1 Datasheet(PDF) 105 Page - STMicroelectronics |
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ST20-C1 Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 205 page  105/205 8 Instruction Set Reference ® enqueue enqueue a process Code: 23 F7 Description: Add the process indicated by the process descriptor in Breg to the queue structure in Areg. The queue control block is defined in Chapter 7. Definition: if (word[Areg @ q.FPtrLoc] = NotProcess) -- queue is empty { word ′[Areg @ q.FPtrLoc] ← Breg word ′[Areg @ q.BPtrLoc] ← Breg } else { word ′[word[Areg @ q.BPtrLoc] @ pw.Link] ← Breg word ′[Areg @ q.BPtrLoc] ← Breg } Areg ′← undefined Breg ′← undefined Creg ′← undefined Status Register: No effect Comments: Secondary instruction. This instruction may require 4 memory accesses. If the queue structure is in off- chip memory then interrupt latency may be affected. Areg must be word aligned (i.e. divisible by 4). See also: dequeue, stop Chapter 7. |
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