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MCIMX503CVM8B Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc |
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MCIMX503CVM8B Datasheet(HTML) 9 Page - Freescale Semiconductor, Inc |
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9 / 134 page ![]() Introduction i.MX50 Applications Processors for Consumer Products, Rev. 2 Freescale Semiconductor 9 416 PoPBGA 13 x 13 mm, 0.5 mm pitch Deleted Pins: DRAM_A10 DRAM_A11 DRAM_A12 DRAM_A13 DRAM_A14 DRAM_CAS DRAM_OPEN DRAM_OPENFB DRAM_RAS DRAM_SDBA0 DRAM_SDBA1 DRAM_SDBA2 DRAM_SDCLK_1 DRAM_SDCLK_1_B DRAM_SDODT0 DRAM_SDODT1 DRAM_SDWE DRAM_OPEN DRAM_OPENFB Added Pins: POP_EMMC_RST POP_LPDDR2_ZQ0 POP_LPDDR2_ZQ1 POP_LPDDR2_1.8V POP_NAND_VCC • The i.MX50 PoPBGA package supports 168-FBGA LPDDR2 DRAM memory only. It is not possible to support LPDDR1 or DDR2 on the i.MX50 PoPBGA. • i.MX50 PoPBGA was designed to accommodate a combined LPDDR2 / eMMC PoP memory. The PoP eMMC device uses the SD3_DATA[7:0], SD3_CLK, and SD3_CMD pins. Because the PoP eMMC I/O and memory supplies are tied together on the substrate, 1.8 V eMMC I/O operation is not supported for the PoP eMMC device. POP_NAND_VCC and NVCC_NANDF must use a 3 V supply. • The NVCC_EMI_DRAM power pins supply 1.2 V power to the i.MX50 DRAM controller as well as the PoP LPDDR2 DRAM. • Additional PoP package pin descriptions may be found in the Special Signals Considerations section (Table 5). • On the PoPBGA package, the DRAM Address, Data, and clock pins are routed to the bottom balls for Freescale test purposes only. It is recommended that these bottom DRAM pins are left unconnected on the customer PCB. • USB_OTG_VDDA25 and USB_H1_VDDA25 are shorted together on the 416 PoPBGA package substrate. • USB_OTG_VDDA33 and USB_H1_VDDA33 are shorted together on the 416 PoPBGA package substrate. 400 MAPBGA 17 x 17 mm, 0.8 mm pitch Deleted Pins: DRAM_SDCLK_1 DRAM_SDCLK_1_B DRAM_A14 DRAM_SDODT1 UART2_CTS UART2_RTS • USB_OTG_VDDA25 and USB_H1_VDDA25 are independent and NOT shorted together on the 400 MAPBGA package substrate. • USB_OTG_VDDA33 and USB_H1_VDDA33 are independent and NOT shorted together on the 400 MAPBGA package substrate. Table 3. Package Feature Comparison (continued) Package Dimensions I/O Pin Differences Versus 416 MAPBGA Notes on Package Differences |
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