S25FS256S datasheet(71/154 Pages) SPANSION

71 / 154 page

November 6, 2013 S25FS-S_00_04

S25FS-S Family

Da ta

Shee t

(Prelim i nar y )

8.6.6

Configuration Register 4

Configuration Register 4 controls the main Flash Array Read commands burst wrap behavior. The burst wrap

configuration does not affect commands reading from areas other than the main flash array e.g. read

commands for registers or OTP array. The non-volatile version of the register provides the ability to set the

start up (boot) state of the controls as the contents are copied to the volatile version of the register during the

POR, hardware reset, or software reset. The volatile version of the register controls the feature behavior

during normal operation. The register bits can be read and changed using the Read Any Register and Write

Any Register commands. The volatile version of the register can also be written by the Set Burst Length

(C0h) command.

8.6.6.1

Configuration Register 4 Non-Volatile (CR4NV)

Related Commands: Read Any Register (RDAR 65h), Write Any Register (WRAR 71h).

Output Impedance Non-Volatile CR4NV[7:5]: These bits control the POR, hardware reset, or software

reset state of the IO signal output impedance (drive strength). Multiple drive strength are available to help

match the output impedance with the system printed circuit board environment to minimize overshoot and

ringing. These non-volatile output impedance configuration bits enable the device to start immediately (boot)

with the appropriate drive strength.

Wrap Enable Non-Volatile CR4NV[4]: This bit controls the POR, hardware reset, or software reset state of

the Wrap Enable. The commands affected by Wrap Enable are: Quad I/O Read, and DDR Quad I/O Read.

This configuration bit enables the device to start immediately (boot) in wrapped burst read mode rather than

the legacy sequential read mode.

Wrap Length Non-Volatile CR4NV[1:0]: These bits controls the POR, hardware reset, or software reset

state of the wrapped read length and alignment. These non-volatile configuration bits enable the device to

start immediately (boot) in wrapped burst read mode rather than the legacy sequential read mode.

Table 8.24 Configuration Register 4 Non-Volatile (CR4NV)

Bits

Field Name

Function

Type

Default

State

Description

OI_O

Output Impedance

OTP

See Table 8.25, Output Impedance Control on page 71.

WE_O

Wrap Enable

0 = Wrap Enabled.

1 = Wrap Disabled.

RFU

Reserved

Reserved for Future Use.

RFU

Reserved

Reserved for Future Use.

WL_O

Wrap Length

00 = 8-byte wrap.

01 = 16-byte wrap.

10 = 32-byte wrap.

11 = 64-byte wrap.

Table 8.25 Output Impedance Control

CR4NV[7:5]

Impedance Selection

Typical Impedance to VSS

(Ohms)

Typical Impedance to VDD

(Ohms)

Notes

000

Factory Default

001

124

105

010

011

100

101

110

111

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