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S25FS256S Datasheet(PDF) 94 Page - SPANSION

Part # S25FS256S
Description  MirrorBit Flash Non-Volatile Memory
PDF  154 Pages
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Manufacturer  SPANSION [SPANSION]
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S25FS256S Datasheet(HTML) 94 Page - SPANSION

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94
S25FS-S Family
S25FS-S_00_04 November 6, 2013
Data
Sheet
(Pre limin ar y)
10.3
Register Access Commands
10.3.1
Read Status Register 1 (RDSR1 05h)
The Read Status Register 1 (RDSR1) command allows the Status Register 1 contents to be read from SO.
The volatile version of Status Register 1 (SR1V) contents may be read at any time, even while a program,
erase, or write operation is in progress. It is possible to read Status Register 1 continuously by providing
multiples of eight clock cycles. The status is updated for each eight cycle read. The maximum clock frequency
for the RDSR1 (05h) command is 133 MHz.
Figure 10.6 Read Status Register 1 (RDSR1) Command Sequence
This command is also supported in QPI Mode. In QPI Mode the instruction is shifted in on IO0-IO3 and the
returning data is shifted out on IO0-IO3, two clock cycles per byte.
Figure 10.7 Read Status Register 1 (RDSR1) QPI Mode Command
10.3.2
Read Status Register 2 (RDSR2 07h)
The Read Status Register 2 (RDSR2) command allows the Status Register 2 contents to be read from SO.
The Status Register 2 contents may be read at any time, even while a program, erase, or write operation is in
progress. It is possible to read the Status Register 2 continuously by providing multiples of eight clock cycles.
The status is updated for each eight cycle read. The maximum clock frequency for the RDSR2 command is
133 MHz.
Figure 10.8 Read Status Register 2 (RDSR2) Command
In QPI Mode, Status Register 2 may be read via the Read Any Register command, see Read Any Register
(RDAR 65h) on page 101
CS#
SCK
SI
SO
Phase
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Instruction
Status
Updated Status
CS#
SCLK
IO0
IO1
IO2
IO3
Phase
4
0
4
0
4
0
4
0
4
0
4
0
5
1
5
1
5
1
5
1
5
1
5
1
6
2
6
2
6
2
6
2
6
2
6
2
7
3
7
3
7
3
7
3
7
3
7
3
Instruct.
D1
D2
D3
D4
D5
CS#
SCK
SI
SO
Phase
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Instruction
Status
Updated Status



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