S25FS256S datasheet(78/154 Pages) SPANSION

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S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

When Block Protection is enabled (i.e., any BP2-0 are set to 1), Advanced Sector Protection (ASP) can still

be used to protect sectors not protected by the Block Protection scheme. In the case that both ASP and Block

Protection are used on the same sector the logical OR of ASP and Block Protection related to the sector is

used.

9.3.1

Freeze Bit

Bit 0 of Configuration Register 1 (CR1V[0]) is the FREEZE bit. The Freeze bit, when set to 1, locks the current

state of the Block Protection control bits and OTP area until the next power off-on cycle. Additional details in

Configuration Register 1 Volatile (CR1V) on page 64.

9.3.2

Write Protect Signal

The Write Protect (WP#) input in combination with the Status Register Write Disable (SRWD) bit (SR1NV[7])

provide hardware input signal controlled protection. When WP# is Low and SRWD is set to 1

Status Register 1 (SR1NV and SR1V) and Configuration Register 1 (CR1NV and CR1V) are protected from

alteration. This prevents disabling or changing the protection defined by the Block Protect bits. See Status

9.4

Advanced Sector Protection

Advanced Sector Protection (ASP) is the name used for a set of independent hardware and software

methods used to disable or enable programming or erase operations, individually, in any or all sectors.

Every main flash array sector has a non-volatile Persistent Protection Bit (PPB) and a volatile Dynamic

Protection Bit (DYB) associated with it. When either bit is 0, the sector is protected from program and erase

operations. The PPB bits are protected from program and erase when the volatile PPB Lock bit is 0. There

are two methods for managing the state of the PPB Lock bit: Password Protection and Persistent Protection.

An overview of these methods is shown in Figure 9.2, Advanced Sector Protection Overview on page 80.

Block Protection and ASP protection settings for each sector are logically ORed to define the protection for

each sector i.e. if either mechanism is protecting a sector the sector cannot be programmed or erased. Refer

to Block Protection on page 77 for full details of the BP2-0 bits.

Table 9.2 Lower Array Start of Protection (TBPROT_O = 1)

Status Register Content

Protected Fraction

of Memory Array

Protected Memory (kbytes)

BP2

BP1

BP0

FS128S

128 Mb

FS256S

256 Mb

0None0

Lower 64th

256

512

Lower 32nd

512

1024

Lower 16th

1024

2048

Lower 8th

2048

4096

Lower 4th

4096

8192

Lower Half

8192

16384

All Sectors

16384

32768

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