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S25FS256S Datasheet(PDF) 77 Page - SPANSION

Part # S25FS256S
Description  MirrorBit Flash Non-Volatile Memory
PDF  154 Pages
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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November 6, 2013 S25FS-S_00_04
S25FS-S Family
77
Da ta
Shee t
(Prelim i nar y )
9.2
Write Enable Command
The Write Enable (WREN) command must be written prior to any command that modifies non-volatile data.
The WREN command sets the Write Enable Latch (WEL) bit. The WEL bit is cleared to 0 (disables writes)
during power-up, hardware reset, or after the device completes the following commands:
Reset
Page Program (PP or 4PP)
Parameter 4-kB Erase (P4E or 4P4E)
Sector Erase (SE or 4SE)
Bulk Erase (BE)
Write Disable (WRDI)
Write Registers (WRR)
Write Any Register (WRAR)
OTP Byte Programming (OTPP)
Advanced Sector Protection Register Program (ASPP)
Persistent Protection Bit Program (PPBP)
Persistent Protection Bit Erase (PPBE)
Password Program (PASSP)
Program Non-Volatile Data Learning Register (PNVDLR)
9.3
Block Protection
The Block Protect bits (Status Register bits BP2, BP1, BP0) in combination with the Configuration Register
TBPROT_O bit can be used to protect an address range of the main flash array from program and erase
operations. The size of the range is determined by the value of the BP bits and the upper or lower starting
point of the range is selected by the TBPROT_O bit of the Configuration Register (CR1NV[5]).
Table 9.1 Upper Array Start of Protection (TBPROT_O = 0)
Status Register Content
Protected Fraction
of Memory Array
Protected Memory (kbytes)
BP2
BP1
BP0
FS128S
128 Mb
FS256S
256 Mb
0
0
0None0
0
0
0
1
Upper 64th
256
512
0
1
0
Upper 32nd
512
1024
0
1
1
Upper 16th
1024
2048
1
0
0
Upper 8th
2048
4096
1
0
1
Upper 4th
4096
8192
1
1
0
Upper Half
8192
16384
1
1
1
All Sectors
16384
32768



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