MT9072AB datasheet(136/275 Pages) ZARLINK

136 / 275 page

MT9072

Data Sheet

136

Zarlink Semiconductor Inc.

Bit

Name

Functional Description

15-4

not used.

3EXZOL

Excessive Zero Overflow Latch. This bit goes high whenever the excessive zero counter

(Y1B) is overflows. This bit is cleared after a read of Y26 or Y36.

EXZL

Excessive Zero Latch. This bit goes high whenever the excessive zero counter (Y1B) is

incremeted by one. This bit is cleared after a read of Y26 or Y36.

TXSLIPL

Transmit SLIP Latch. This bit goes high whenever a transmit slip occurs. This bit is

cleared after a read of Y26 or Y36.

RXSLIPL

Receive SLIP Latch. This bit goes high whenever a controlled frame slip occurs in the

receive elastic buffer. This bit is cleared after a read of Y26 or Y36.

Table 98 - Elastic Store and Excessive Zero Status Latch(Y26) (T1)

Bit

Name

Functional Description

15-0 FCL<15:0> Framing Bit Error Count Latch. These bits make up a latch which samples the current

value of the Framing Bit Error Counter (address Y17) on the rising edge of the internal one

second timer. This latch is cleared with a RESET (RESET pin or RST bit).

Table 99 - Framing Bit Error Count Latch(Y28) (T1)

Bit

Name

Functional Description

15-0

BPVL<15:0> Bipolar Violation Count Latch. These bits make up a latch which samples the current

value of the Bipolar Violation Error Counter (address Y18) on the rising edge of the

internal one second timer. This latch is cleared with a RESET (RESET pin or RST bit).

Table 100 - Bipolar Violation Count Latch(Y29) (T1)

Bit

Name

Functional Description

15-0 CRCL<15:0> CRC-6 Error Count Latch. These bits make up a latch which samples the current value

of the CRC Error Counter (address Y19) on the rising edge of the internal one second

timer. This latch is cleared with a RESET (RESET pin or RST bit)

Table 101 - CRC-6 Error Count Latch(Y2A) (T1)

MT9072AB Datasheet(PDF) 136 Page - Zarlink Semiconductor Inc

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