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TMS320F28076PZP Datasheet(PDF) 57 Page - Texas Instruments |
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TMS320F28076PZP Datasheet(HTML) 57 Page - Texas Instruments |
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57 / 192 page ![]() 7.9.5.1 JTAG Electrical Data and Timing Section 7.9.5.1.1 lists the JTAG timing requirements. Section 7.9.5.1.2 lists the JTAG switching characteristics. Figure 7-11 shows the JTAG timing. 7.9.5.1.1 JTAG Timing Requirements NO. MIN MAX UNIT 1 tc(TCK) Cycle time, TCK 66.66 ns 1a tw(TCKH) Pulse duration, TCK high (40% of tc) 26.66 ns 1b tw(TCKL) Pulse duration, TCK low (40% of tc) 26.66 ns 3 tsu(TDI-TCKH) Input setup time, TDI valid to TCK high 13 ns tsu(TMS-TCKH) Input setup time, TMS valid to TCK high 13 ns 4 th(TCKH-TDI) Input hold time, TDI valid from TCK high 7 ns th(TCKH-TMS) Input hold time, TMS valid from TCK high 7 ns 7.9.5.1.2 JTAG Switching Characteristics over recommended operating conditions (unless otherwise noted) NO. PARAMETER MIN MAX UNIT 2 td(TCKL-TDO) Delay time, TCK low to TDO valid 6 25 ns 3 TCK TDO TDI/TMS 2 4 1 1a 1b Figure 7-11. JTAG Timing www.ti.com TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: TMS320F28076 TMS320F28075 |
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