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TMS320F28076PZP Datasheet(PDF) 72 Page - Texas Instruments |
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TMS320F28076PZP Datasheet(HTML) 72 Page - Texas Instruments |
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72 / 192 page  7.9.9.3 EMIF Electrical Data and Timing Note This device has one EMIF interface. In this section, EMx denotes EM1. 7.9.9.3.1 Asynchronous RAM Section 7.9.9.3.1.1 shows the EMIF asynchronous memory timing requirements. Section 7.9.9.3.1.2 shows the EMIF asynchronous memory switching characteristics. Figure 7-21 through Figure 7-24 show the EMIF asynchronous memory timing diagrams. 7.9.9.3.1.1 EMIF Asynchronous Memory Timing Requirements NO.(1) MIN MAX UNIT Reads and Writes E EMIF clock period tc(SYSCLK) ns 2 tw(EM_WAIT) Pulse duration, EMxWAIT assertion and deassertion 2E ns Reads 12 tsu(EMDV-EMOEH) Setup time, EMxD[y:0] valid before EMxOE high 15 ns 13 th(EMOEH-EMDIV) Hold time, EMxD[y:0] valid after EMxOE high 0 ns 14 tsu(EMOEL-EMWAIT) Setup Time, EMxWAIT asserted before end of Strobe Phase(2) 4E+20 ns Writes 28 tsu(EMWEL-EMWAIT) Setup Time, EMxWAIT asserted before end of Strobe Phase(2) 4E+20 ns (1) E = EMxCLK period in ns. (2) Setup before end of STROBE phase (if no extended wait states are inserted) by which EMxWAIT must be asserted to add extended wait states. Figure 7-22 and Figure 7-24 describe EMIF transactions that include extended wait states inserted during the STROBE phase. However, cycles inserted as part of this extended wait period should not be counted; the 4E requirement is to the start of where the HOLD phase would begin if there were no extended wait cycles. 7.9.9.3.1.2 EMIF Asynchronous Memory Switching Characteristics NO.(1) (2) (3) PARAMETER MIN MAX UNIT Reads and Writes 1 td(TURNAROUND) Turn around time (TA)*E–3 (TA)*E+2 ns Reads 3 tc(EMRCYCLE) EMIF read cycle time (EW = 0) (RS+RST+RH)*E–3 (RS+RST+RH)*E+2 ns EMIF read cycle time (EW = 1) (RS+RST+RH+ (EWC*16))*E–3 (RS+RST+RH+ (EWC*16))*E+2 ns 4 tsu(EMCEL-EMOEL) Output setup time, EMxCS[y:2] low to EMxOE low (SS = 0) (RS)*E–3 (RS)*E+2 ns Output setup time, EMxCS[y:2] low to EMxOE low (SS = 1) –3 2 ns 5 th(EMOEH-EMCEH) Output hold time, EMxOE high to EMxCS[y:2] high (SS = 0) (RH)*E–3 (RH)*E ns Output hold time, EMxOE high to EMxCS[y:2] high (SS = 1) –3 0 ns 6 tsu(EMBAV-EMOEL) Output setup time, EMxBA[y:0] valid to EMxOE low (RS)*E–3 (RS)*E+2 ns 7 th(EMOEH-EMBAIV) Output hold time, EMxOE high to EMxBA[y:0] invalid (RH)*E–3 (RH)*E ns 8 tsu(EMAV-EMOEL) Output setup time, EMxA[y:0] valid to EMxOE low (RS)*E–3 (RS)*E+2 ns TMS320F28076, TMS320F28075 SPRS902J – OCTOBER 2014 – REVISED FEBRUARY 2021 www.ti.com 72 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28076 TMS320F28075 |
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